SPDX: Convert all of our single license tags to Linux Kernel style

[u-boot] / board / logicpd / omap3som / omap3logic.c

diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index cebb200c5ff8d2eabbebd85d092e7c2e947c2e38..fbad89b696403df1511ad464898df574a5c626bf 100644 (file)
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2011
  * Logic Product Development <www.logicpd.com>
@@ -8,8 +9,6 @@
  * Derived from Beagle Board and 3430 SDP code by
  *     Richard Woodruff <r-woodruff2@ti.com>
  *     Syed Mohammed Khasim <khasim@ti.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
 #include <dm.h>
@@ -40,21 +39,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* This is only needed until SPL gets OF support */
-#ifdef CONFIG_SPL_BUILD
-static const struct ns16550_platdata omap3logic_serial = {
-       .base = OMAP34XX_UART1,
-       .reg_shift = 2,
-       .clock = V_NS16550_CLK,
-       .fcr = UART_FCR_DEFVAL,
-};
-
-U_BOOT_DEVICE(omap3logic_uart) = {
-       "ns16550_serial",
-       &omap3logic_serial
-};
-#endif
-
 /*
  * two dimensional array of strucures containining board name and Linux
  * machine IDs; row it selected based on CPU column is slected based
@@ -114,6 +98,47 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
        timings->ctrlb = MICRON_V_ACTIMB_200;
        timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
 }
+
+#define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE + 0x7c)
+#define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE + 0x84)
+#define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE + 0x80)
+
+void spl_board_prepare_for_linux(void)
+{
+       /* The Micron NAND starts locked which
+        * prohibits mounting the NAND as RW
+        * The following commands are what unlocks
+        * the NAND to become RW Falcon Mode does not
+        * have as many smarts as U-Boot, but Logic PD
+        * only makes NAND with 512MB so these hard coded
+        * values should work for all current models
+        */
+
+       writeb(0x70, GPMC_NAND_COMMAND_0);
+       writeb(-1, GPMC_NAND_DATA_0);
+       writeb(0x7a, GPMC_NAND_COMMAND_0);
+       writeb(0x00, GPMC_NAND_ADDRESS_0);
+       writeb(0x00, GPMC_NAND_ADDRESS_0);
+       writeb(0x00, GPMC_NAND_ADDRESS_0);
+       writeb(-1, GPMC_NAND_COMMAND_0);
+
+       /* Begin address 0 */
+       writeb(NAND_CMD_UNLOCK1, 0x6e00007c);
+       writeb(0x00, GPMC_NAND_ADDRESS_0);
+       writeb(0x00, GPMC_NAND_ADDRESS_0);
+       writeb(0x00, GPMC_NAND_ADDRESS_0);
+       writeb(-1, GPMC_NAND_DATA_0);
+
+       /* Ending address at the end of Flash */
+       writeb(NAND_CMD_UNLOCK2, GPMC_NAND_COMMAND_0);
+       writeb(0xc0, GPMC_NAND_ADDRESS_0);
+       writeb(0xff, GPMC_NAND_ADDRESS_0);
+       writeb(0x03, GPMC_NAND_ADDRESS_0);
+       writeb(-1, GPMC_NAND_DATA_0);
+       writeb(0x79, GPMC_NAND_COMMAND_0);
+       writeb(-1, GPMC_NAND_DATA_0);
+       writeb(-1, GPMC_NAND_DATA_0);
+}
 #endif
 
 #ifdef CONFIG_USB_MUSB_OMAP2PLUS