[Microblaze][PATCH] part 2

[u-boot] / board / mcc200 / mcc200.c

diff --git a/board/mcc200/mcc200.c b/board/mcc200/mcc200.c
index 8b475c690d9d24affb9d3e33930720a130482f23..af047e2a0772a281303f99590ddc79fe1739bc12 100644 (file)
--- a/board/mcc200/mcc200.c
+++ b/board/mcc200/mcc200.c
@@ -44,6 +44,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 extern flash_info_t flash_info[];      /* FLASH chips info */
 
+extern int do_auto_update(void);
 ulong flash_get_size (ulong base, int banknum);
 
 #ifndef CFG_RAMBOOT
@@ -91,8 +92,8 @@ static void sdram_start (int hi_addr)
 
 /*
  * ATTENTION: Although partially referenced initdram does NOT make real use
- *            use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
- *            is something else than 0x00000000.
+ *           use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
+ *           is something else than 0x00000000.
  */
 
 long int initdram (int board_type)
@@ -205,8 +206,7 @@ long int initdram (int board_type)
         */
        svr = get_svr();
        pvr = get_pvr();
-       if ((SVR_MJREV(svr) >= 2) && (PVR_MAJ(pvr) == 1) && 
-           (PVR_MIN(pvr) == 4)) {
+       if ((SVR_MJREV(svr) >= 2) && (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) {
                *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
                __asm__ volatile ("sync");
        }
@@ -290,6 +290,9 @@ int misc_init_r (void)
                flash_info[0].sector_count = snum;
        }
 
+#ifdef CONFIG_AUTO_UPDATE
+       do_auto_update();
+#endif
        return (0);
 }