Coding style cleanup

[u-boot] / board / mpc8349itx / pci.c

diff --git a/board/mpc8349itx/pci.c b/board/mpc8349itx/pci.c
index 247b3a6ecc94e962100d7e43532bc790503ab84a..e81ad2735686c616e73229dbd376da84eeee9f9b 100644 (file)
--- a/board/mpc8349itx/pci.c
+++ b/board/mpc8349itx/pci.c
@@ -29,6 +29,9 @@
 #include <pci.h>
 #include <asm/mpc8349_pci.h>
 #include <i2c.h>
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -88,7 +91,7 @@ void pci_init_board(void)
        u32 dev;
        struct pci_controller *hose;
 
-       immr = (immap_t *) CFG_IMMRBAR;
+       immr = (immap_t *) CFG_IMMR;
        clk = (clk83xx_t *) & immr->clk;
        pci_law = immr->sysconf.pcilaw;
        pci_pot = immr->ios.pot;
@@ -105,7 +108,7 @@ void pci_init_board(void)
        udelay(2000);
 
 #ifdef CONFIG_HARD_I2C
-       i2c_set_bus_num(I2C_BUS_2);
+       i2c_set_bus_num(1);
        /* Read the PCI_M66EN jumper setting */
        if ((i2c_read(CFG_I2C_8574_ADDR2, 0, 0, &reg8, sizeof(reg8)) == 0) ||
            (i2c_read(CFG_I2C_8574A_ADDR2, 0, 0, &reg8, sizeof(reg8)) == 0)) {
@@ -150,7 +153,7 @@ void pci_init_board(void)
        pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
 
        pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
-       pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
+       pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M;
 
        /*
         * Configure PCI Outbound Translation Windows
@@ -159,18 +162,17 @@ void pci_init_board(void)
        /* PCI1 mem space - prefetch */
        pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[0].pocmr =
-           POCMR_EN | POCMR_PREFETCH_EN | (POCMR_CM_256M & POCMR_CM_MASK);
+       pci_pot[0].pocmr = POCMR_EN | POCMR_PREFETCH_EN | POCMR_CM_256M;
 
        /* PCI1 IO space */
        pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
+       pci_pot[1].pocmr = POCMR_EN | POCMR_IO | POCMR_CM_16M;
 
        /* PCI1 mmio - non-prefetch mem space */
        pci_pot[2].potar = (CFG_PCI1_MMIO_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[2].pobar = (CFG_PCI1_MMIO_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[2].pocmr = POCMR_EN | (POCMR_CM_256M & POCMR_CM_MASK);
+       pci_pot[2].pocmr = POCMR_EN | POCMR_CM_256M;
 
        /*
         * Configure PCI Inbound Translation Windows
@@ -212,7 +214,7 @@ void pci_init_board(void)
        hose->region_count = 4;
 
        pci_setup_indirect(hose,
-                          (CFG_IMMRBAR + 0x8300), (CFG_IMMRBAR + 0x8304));
+                          (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
 
        pci_register_hose(hose);
 
@@ -250,21 +252,17 @@ void pci_init_board(void)
        /* PCI2 mem space - prefetch */
        pci_pot[3].potar = (CFG_PCI2_MEM_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[3].pobar = (CFG_PCI2_MEM_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[3].pocmr =
-           POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN | (POCMR_CM_256M &
-                                                        POCMR_CM_MASK);
+       pci_pot[3].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN | POCMR_CM_256M;
 
        /* PCI2 IO space */
        pci_pot[4].potar = (CFG_PCI2_IO_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[4].pobar = (CFG_PCI2_IO_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[4].pocmr =
-           POCMR_EN | POCMR_PCI2 | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
+       pci_pot[4].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_IO | POCMR_CM_16M;
 
        /* PCI2 mmio - non-prefetch mem space */
        pci_pot[5].potar = (CFG_PCI2_MMIO_BASE >> 12) & POTAR_TA_MASK;
        pci_pot[5].pobar = (CFG_PCI2_MMIO_PHYS >> 12) & POBAR_BA_MASK;
-       pci_pot[5].pocmr =
-           POCMR_EN | POCMR_PCI2 | (POCMR_CM_256M & POCMR_CM_MASK);
+       pci_pot[5].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_CM_256M;
 
        /*
         * Configure PCI Inbound Translation Windows
@@ -307,7 +305,7 @@ void pci_init_board(void)
        hose->region_count = 4;
 
        pci_setup_indirect(hose,
-                          (CFG_IMMRBAR + 0x8380), (CFG_IMMRBAR + 0x8384));
+                          (CFG_IMMR + 0x8380), (CFG_IMMR + 0x8384));
 
        pci_register_hose(hose);
 
@@ -335,3 +333,25 @@ void pci_init_board(void)
 }
 
 #endif                         /* CONFIG_PCI */
+#ifdef CONFIG_OF_FLAT_TREE
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+               u32 *p;
+               int len;
+
+               p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+               if (p != NULL) {
+               p[0] = pci_hose[0].first_busno;
+               p[1] = pci_hose[0].last_busno;
+               }
+
+#ifdef CONFIG_MPC83XX_PCI2
+       p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len);
+       if (p != NULL) {
+               p[0] = pci_hose[1].first_busno;
+               p[1] = pci_hose[1].last_busno;
+       }
+#endif
+}
+#endif /* CONFIG_OF_FLAT_TREE */