#include <asm/io.h>
#include <asm/mmu.h>
#include <asm/cache.h>
-#include <ppc440.h>
+#include <asm/ppc440.h>
void hcu_led_set(u32 value);
void dcbz_area(u32 start_address, u32 num_bytes);
/* -----------------------------------------------------------+
* Wait for the DCC master delay line to finish calibration
* ----------------------------------------------------------*/
- mtdcr(memcfga, DDR0_17);
+ mtdcr(SDRAM0_CFGADDR, DDR0_17);
val = DDR0_17_DLLLOCKREG_UNLOCKED;
while (wait != 0xffff) {
- val = mfdcr(memcfgd);
+ val = mfdcr(SDRAM0_CFGDATA);
if ((val & DDR0_17_DLLLOCKREG_MASK) ==
DDR0_17_DLLLOCKREG_LOCKED)
/* dlllockreg bit on */