]> git.sur5r.net Git - u-boot/blobdiff - board/nvidia/dalmore/pinmux-config-dalmore.h
mx23evk: Do not set voltage selection bit for SSP pads
[u-boot] / board / nvidia / dalmore / pinmux-config-dalmore.h
index cb48b3ba1f0b852e5976684381ad99429df667f3..8c05a1517c1171337ec7d1baa8013f509d6fb496 100644 (file)
 
 #define USB_PINMUX CEC_PINMUX
 
+#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
+       {                                               \
+               .padgrp = PDRIVE_PINGROUP_##_padgrp,    \
+               .slwf   = _slwf,                        \
+               .slwr   = _slwr,                        \
+               .drvup  = _drvup,                       \
+               .drvdn  = _drvdn,                       \
+               .lpmd   = PGRP_LPMD_##_lpmd,            \
+               .schmt  = PGRP_SCHMT_##_schmt,          \
+               .hsm    = PGRP_HSM_##_hsm,              \
+       }
+
 static struct pingroup_config tegra114_pinmux_common[] = {
        /* EXTPERIPH1 pinmux */
        DEFAULT_PINMUX(CLK1_OUT,      EXTPERIPH1,  NORMAL,    NORMAL,   OUTPUT),
@@ -349,4 +361,10 @@ static struct pingroup_config tegra114_pinmux_set_nontristate[] = {
 
        DEFAULT_PINMUX(SDMMC3_CD_N,     SDMMC3, UP,       NORMAL,   INPUT),
 };
+
+static struct padctrl_config dalmore_padctrl[] = {
+       /* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+       DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
+               SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
+};
 #endif /* PINMUX_CONFIG_COMMON_H */