arm: mxs: olinuxino: move DRAM config tuning to SPL

[u-boot] / board / raidsonic / ib62x0 / ib62x0.c

diff --git a/board/raidsonic/ib62x0/ib62x0.c b/board/raidsonic/ib62x0/ib62x0.c
index 976ba4ce94226c8f464944ca6c456a29d6c52269..f01fb1c6e7624bbe66d9714fc3fbfe0d98db0619 100644 (file)
--- a/board/raidsonic/ib62x0/ib62x0.c
+++ b/board/raidsonic/ib62x0/ib62x0.c
@@ -11,7 +11,7 @@
 #include <miiphy.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
-#include <asm/arch/kirkwood.h>
+#include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include "ib62x0.h"
 
@@ -24,9 +24,9 @@ int board_early_init_f(void)
         * There are maximum 64 gpios controlled through 2 sets of registers
         * the below configuration configures mainly initial LED status
         */
-       kw_config_gpio(IB62x0_OE_VAL_LOW,
-                       IB62x0_OE_VAL_HIGH,
-                       IB62x0_OE_LOW, IB62x0_OE_HIGH);
+       mvebu_config_gpio(IB62x0_OE_VAL_LOW,
+                         IB62x0_OE_VAL_HIGH,
+                         IB62x0_OE_LOW, IB62x0_OE_HIGH);
 
        /* Set SATA activity LEDs to default off */
        writel(MVSATAHC_LED_POLARITY_CTRL, MVSATAHC_LED_CONF_REG);
@@ -62,7 +62,7 @@ int board_early_init_f(void)
 int board_init(void)
 {
        /* adress of boot parameters */
-       gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+       gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
        return 0;
 }