arm: rmobile: rcar: Move arch_preboot_os function to rcar-gen2-common/common.c

[u-boot] / board / renesas / koelsch / koelsch.c

diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index d4f63724b44873d28f920d6cdc7d28f9b492bdff..10fa571d07fa607d1f3b2e7becb5e14da7a7b1f0 100644 (file)
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -16,47 +16,38 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/arch/rmobile.h>
+#include <asm/arch/rcar-mstp.h>
 #include <netdev.h>
 #include <miiphy.h>
 #include <i2c.h>
+#include <div64.h>
 #include "qos.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define CLK2MHZ(clk)   (clk / 1000 / 1000)
 void s_init(void)
 {
        struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
        struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
+       u32 stc;
 
        /* Watchdog init */
        writel(0xA5A5A500, &rwdt->rwtcsra);
        writel(0xA5A5A500, &swdt->swtcsra);
 
+       /* CPU frequency setting. Set to 1.5GHz */
+       stc = ((1500 / CLK2MHZ(CONFIG_SYS_CLK_FREQ)) - 1) << PLL0_STC_BIT;
+       clrsetbits_le32(PLL0CR, PLL0_STC_MASK, stc);
+
        /* QoS */
        qos_init();
 }
 
-#define MSTPSR1                0xE6150038
-#define SMSTPCR1       0xE6150134
 #define TMU0_MSTP125   (1 << 25)
-
-#define MSTPSR7                0xE61501C4
-#define SMSTPCR7       0xE615014C
 #define SCIF0_MSTP721  (1 << 21)
-
-#define MSTPSR8                0xE61509A0
-#define SMSTPCR8       0xE6150990
 #define ETHER_MSTP813  (1 << 13)
 
-#define mstp_setbits(type, addr, saddr, set) \
-       out_##type((saddr), in_##type(addr) | (set))
-#define mstp_clrbits(type, addr, saddr, clear) \
-       out_##type((saddr), in_##type(addr) & ~(clear))
-#define mstp_setbits_le32(addr, saddr, set) \
-       mstp_setbits(le32, addr, saddr, set)
-#define mstp_clrbits_le32(addr, saddr, clear)   \
-       mstp_clrbits(le32, addr, saddr, clear)
-
 int board_early_init_f(void)
 {
        mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
@@ -70,12 +61,6 @@ int board_early_init_f(void)
        return 0;
 }
 
-void arch_preboot_os(void)
-{
-       /* Disable TMU0 */
-       mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
-}
-
 /* LSI pin pull-up control */
 #define PUPR5 0xe6060114
 #define PUPR5_ETH 0x3FFC0000
@@ -83,7 +68,7 @@ void arch_preboot_os(void)
 int board_init(void)
 {
        /* adress of boot parameters */
-       gd->bd->bi_boot_params = KOELSCH_SDRAM_BASE + 0x100;
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
        /* Init PFC controller */
        r8a7791_pinmux_init();
@@ -143,7 +128,6 @@ int board_eth_init(bd_t *bis)
 
 int dram_init(void)
 {
-       gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
        gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 
        return 0;
@@ -167,17 +151,6 @@ const struct rmobile_sysinfo sysinfo = {
        CONFIG_RMOBILE_BOARD_STRING
 };
 
-void dram_init_banksize(void)
-{
-       gd->bd->bi_dram[0].start = KOELSCH_SDRAM_BASE;
-       gd->bd->bi_dram[0].size = KOELSCH_SDRAM_SIZE;
-}
-
-int board_late_init(void)
-{
-       return 0;
-}
-
 void reset_cpu(ulong addr)
 {
        u8 val;