* MA 02111-1307 USA
*/
-#include <asm/u-boot.h>
#include <common.h>
+#include <asm/u-boot.h>
#include <ioports.h>
#include <mpc8260.h>
#include <i2c.h>
#include <spi.h>
+#include <command.h>
#ifdef CONFIG_SHOW_BOOT_PROGRESS
#include <status_led.h>
#endif
+#ifdef CONFIG_ETHER_LOOPBACK_TEST
+extern void eth_loopback_test(void);
+#endif /* CONFIG_ETHER_LOOPBACK_TEST */
+
+extern int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
#include "clkinit.h"
#include "ioconfig.h" /* I/O configuration table */
#define ADC_INITIAL_DELAY (10 * ADC_VREF_CAP) /* 10 usec per uF, in usec */
#define ADC_SDATA_DELAY 100 /* ADC SDATA release delay in usec */
#define ADC_CAL_DELAY (1000000 / INITIAL_SAMPLE_RATE * 4500)
- /* Wait at least 4100 LRCLK's */
+ /* Wait at least 4100 LRCLK's */
#define ADC_REG1_FRAME_START 0x80 /* Frame start */
#define ADC_REG1_GROUND_CAL 0x40 /* Ground calibration enable */
/* ------------------------------------------------------------------------- */
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile memctl8260_t *memctl = &immap->im_memctl;
else if(j == 4) cols = data & 0x0F;
else if(j == 12) {
/*
- * Refresh rate: this assumes the prescaler is set to
+ * Refresh rate: this assumes the prescaler is set to
* approximately 1uSec per tick.
*/
switch(data & 0x7F) {
- default:
- case 0: psrt = 14 ; /* 15.625uS */ break;
- case 1: psrt = 2; /* 3.9uS */ break;
- case 2: psrt = 6; /* 7.8uS */ break;
- case 3: psrt = 29; /* 31.3uS */ break;
- case 4: psrt = 60; /* 62.5uS */ break;
- case 5: psrt = 120; /* 125uS */ break;
+ default:
+ case 0: psrt = 14 ; /* 15.625uS */ break;
+ case 1: psrt = 2; /* 3.9uS */ break;
+ case 2: psrt = 6; /* 7.8uS */ break;
+ case 3: psrt = 29; /* 31.3uS */ break;
+ case 4: psrt = 60; /* 62.5uS */ break;
+ case 5: psrt = 120; /* 125uS */ break;
}
}
else if(j == 17) banks = data;
#endif
else {
printf ("WARNING: Unknown CAS latency 0x%02X, using 3\n",
- data);
+ data);
}
}
else if(j == 63) {
if(data != cksum) {
printf ("WARNING: Configuration data checksum failure:"
- " is 0x%02x, calculated 0x%02x\n",
+ " is 0x%02x, calculated 0x%02x\n",
data, cksum);
}
}
/* We don't trust CL less than 2 (only saw it on an old 16MByte DIMM) */
if(caslatency < 2) {
- printf("CL was %d, forcing to 2\n", caslatency);
+ printf("WARNING: CL was %d, forcing to 2\n", caslatency);
caslatency = 2;
}
if(rows > 14) {
- printf("This doesn't look good, rows = %d, should be <= 14\n", rows);
+ printf("WARNING: This doesn't look good, rows = %d, should be <= 14\n", rows);
rows = 14;
}
if(cols > 11) {
- printf("This doesn't look good, columns = %d, should be <= 11\n", cols);
+ printf("WARNING: This doesn't look good, columns = %d, should be <= 11\n", cols);
cols = 11;
}
PSDMR_ACTTORW_8W |\
PSDMR_WRC_4C |\
PSDMR_EAMUX |\
- PSDMR_BUFCMD) |\
+ PSDMR_BUFCMD) |\
caslatency |\
((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \
(sdam << 24) |\
PSDMR_ACTTORW_2W | /* 1 for 7E parts (fast PC-133) */ \
PSDMR_WRC_1C | /* 1 clock + 7nSec */
EAMUX |\
- BUFCMD) |\
+ BUFCMD) |\
caslatency |\
((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \
(sdam << 24) |\
* two chip selects (double sided).
*/
if(chipselects > 1) {
- ramaddr += sdram_size;
+ ramaddr += sdram_size;
memctl->memc_br3 = CFG_BR3_PRELIM + sdram_size;
memctl->memc_or3 = or;
int sample_128x; /* Use 128/4 clocking for the ADC/DAC */
int right_just; /* Is the data to the DAC right justified? */
int mclk_divide; /* MCLK Divide */
+ int quiet; /* Quiet or minimal output mode */
+
+ quiet = 0;
+ if ((ep = getenv("quiet")) != NULL) {
+ quiet = simple_strtol(ep, NULL, 10);
+ }
+ else {
+ setenv("quiet", "0");
+ }
/*
* SACSng custom initialization:
sample_rate = INITIAL_SAMPLE_RATE;
if ((ep = getenv("DaqSampleRate")) != NULL) {
- sample_rate = simple_strtol(ep, NULL, 10);
+ sample_rate = simple_strtol(ep, NULL, 10);
}
sample_64x = INITIAL_SAMPLE_64X;
sample_128x = INITIAL_SAMPLE_128X;
if ((ep = getenv("Daq64xSampling")) != NULL) {
- sample_64x = simple_strtol(ep, NULL, 10);
+ sample_64x = simple_strtol(ep, NULL, 10);
if (sample_64x) {
sample_128x = 0;
}
}
}
else {
- if ((ep = getenv("Daq128xSampling")) != NULL) {
+ if ((ep = getenv("Daq128xSampling")) != NULL) {
sample_128x = simple_strtol(ep, NULL, 10);
if (sample_128x) {
- sample_64x = 0;
+ sample_64x = 0;
}
else {
- sample_64x = 1;
+ sample_64x = 1;
}
}
}
- /*
+ /*
* Stop the clocks and wait for at least 1 LRCLK period
* to make sure the clocking has really stopped.
*/
setenv("DaqSampleRate", str_buf);
if (sample_64x) {
- setenv("Daq64xSampling", "1");
- setenv("Daq128xSampling", NULL);
+ setenv("Daq64xSampling", "1");
+ setenv("Daq128xSampling", NULL);
}
else {
- setenv("Daq64xSampling", NULL);
- setenv("Daq128xSampling", "1");
+ setenv("Daq64xSampling", NULL);
+ setenv("Daq128xSampling", "1");
}
- /* Display the ADC/DAC clocking information */
- Daq_Display_Clocks();
+ /*
+ * Display the ADC/DAC clocking information
+ */
+ if (!quiet) {
+ Daq_Display_Clocks();
+ }
/*
* Determine the DAC data justification
right_just = INITIAL_RIGHT_JUST;
if ((ep = getenv("DaqDACRightJustified")) != NULL) {
- right_just = simple_strtol(ep, NULL, 10);
+ right_just = simple_strtol(ep, NULL, 10);
}
sprintf(str_buf, "%d", right_just);
mclk_divide = INITIAL_MCLK_DIVIDE;
if ((ep = getenv("DaqDACMClockDivide")) != NULL) {
- mclk_divide = simple_strtol(ep, NULL, 10);
+ mclk_divide = simple_strtol(ep, NULL, 10);
}
sprintf(str_buf, "%d", mclk_divide);
* 4) Enable address matching by setting the MSB in register 7
*/
- printf("Initializing the ADC...\n");
+ if (!quiet) {
+ printf("Initializing the ADC...\n");
+ }
udelay(ADC_INITIAL_DELAY); /* 10uSec per uF of VREF cap */
iopa->pdat &= ~ADC_SDATA1_MASK; /* release SDATA1 */
* sending an I2C "start" sequence. When we bring the I2C back to
* the normal state, we send an I2C "stop" sequence.
*/
- printf("Initializing the DAC...\n");
+ if (!quiet) {
+ printf("Initializing the DAC...\n");
+ }
/*
* Bring the I2C clock and data lines low for initialization
*/
i2c_reg_write(I2C_DAC_ADDR, 0x01,
(right_just ? DAC_REG1_RIGHT_JUST_24BIT :
- DAC_REG1_LEFT_JUST_24_BIT) |
+ DAC_REG1_LEFT_JUST_24_BIT) |
DAC_REG1_DEM_NO |
(sample_rate >= 50000 ? DAC_REG1_DOUBLE : DAC_REG1_SINGLE));
I2C_DELAY;
I2C_TRISTATE;
- printf("\n");
+ if (!quiet) {
+ printf("\n");
+ }
+
+#ifdef CONFIG_ETHER_LOOPBACK_TEST
+ /*
+ * Run the Ethernet loopback test
+ */
+ eth_loopback_test ();
+#endif /* CONFIG_ETHER_LOOPBACK_TEST */
#ifdef CONFIG_SHOW_BOOT_PROGRESS
/*
* Recursively do upper digits.
*/
if(digits > 1) {
- flash_code(number / modulo, modulo, digits - 1);
+ flash_code(number / modulo, modulo, digits - 1);
}
number = number % modulo;
* Zero is indicated by one long flash (dash).
*/
if(number == 0) {
- status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
- udelay(1000000);
- status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF);
- udelay(200000);
+ status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
+ udelay(1000000);
+ status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF);
+ udelay(200000);
} else {
- /*
- * Non-zero is indicated by short flashes, one per count.
- */
- for(j = 0; j < number; j++) {
- status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
- udelay(100000);
- status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF);
- udelay(200000);
- }
+ /*
+ * Non-zero is indicated by short flashes, one per count.
+ */
+ for(j = 0; j < number; j++) {
+ status_led_set(STATUS_LED_BOOT, STATUS_LED_ON);
+ udelay(100000);
+ status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF);
+ udelay(200000);
+ }
}
/*
* Inter-digit pause: we've already waited 200 mSec, wait 1 sec total
void show_boot_progress (int status)
{
- if(status != -1) {
- last_boot_progress = status;
+ int i,j;
+ if(status > 0) {
+ last_boot_progress = status;
} else {
- /*
- * Houston, we have a problem. Blink the last OK status which
- * indicates where things failed.
- */
- status_led_set(STATUS_LED_RED, STATUS_LED_ON);
- flash_code(last_boot_progress, 5, 3);
- udelay(1000000);
- status_led_set(STATUS_LED_RED, STATUS_LED_BLINKING);
+ /*
+ * If a specific failure code is given, flash this code
+ * else just use the last success code we've seen
+ */
+ if(status < -1)
+ last_boot_progress = -status;
+
+ /*
+ * Flash this code 5 times
+ */
+ for(j=0; j<5; j++) {
+ /*
+ * Houston, we have a problem.
+ * Blink the last OK status which indicates where things failed.
+ */
+ status_led_set(STATUS_LED_RED, STATUS_LED_ON);
+ flash_code(last_boot_progress, 5, 3);
+
+ /*
+ * Delay 5 seconds between repetitions,
+ * with the fault LED blinking
+ */
+ for(i=0; i<5; i++) {
+ status_led_set(STATUS_LED_RED, STATUS_LED_OFF);
+ udelay(500000);
+ status_led_set(STATUS_LED_RED, STATUS_LED_ON);
+ udelay(500000);
+ }
+ }
+
+ /*
+ * Reset the board to retry initialization.
+ */
+ do_reset (NULL, 0, 0, NULL);
}
}
#endif /* CONFIG_SHOW_BOOT_PROGRESS */
/*
* The following are used to control the SPI chip selects for the SPI command.
*/
-#if (CONFIG_COMMANDS & CFG_CMD_SPI)
+#if defined(CONFIG_CMD_SPI)
#define SPI_ADC_CS_MASK 0x00000800
#define SPI_DAC_CS_MASK 0x00001000
-void spi_adc_chipsel(int cs)
+static const u32 cs_mask[] = {
+ SPI_ADC_CS_MASK,
+ SPI_DAC_CS_MASK,
+};
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+ return bus == 0 && cs < sizeof(cs_mask) / sizeof(cs_mask[0]);
+}
+
+void spi_cs_activate(struct spi_slave *slave)
{
volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);
- if(cs)
- iopd->pdat &= ~SPI_ADC_CS_MASK; /* activate the chip select */
- else
- iopd->pdat |= SPI_ADC_CS_MASK; /* deactivate the chip select */
+ iopd->pdat &= ~cs_mask[slave->cs];
}
-void spi_dac_chipsel(int cs)
+void spi_cs_deactivate(struct spi_slave *slave)
{
volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);
- if(cs)
- iopd->pdat &= ~SPI_DAC_CS_MASK; /* activate the chip select */
- else
- iopd->pdat |= SPI_DAC_CS_MASK; /* deactivate the chip select */
+ iopd->pdat |= cs_mask[slave->cs];
}
+#endif
+
+#endif /* CONFIG_MISC_INIT_R */
+
+#ifdef CONFIG_POST
/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects: it calls the appropriate function to control the SPI
- * chip selects.
+ * Returns 1 if keys pressed to start the power-on long-running tests
+ * Called from board_init_f().
*/
-spi_chipsel_type spi_chipsel[] = {
- spi_adc_chipsel,
- spi_dac_chipsel
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
-
-#endif /* CFG_CMD_SPI */
+int post_hotkeys_pressed(void)
+{
+ return 0; /* No hotkeys supported */
+}
-#endif /* CONFIG_MISC_INIT_R */
+#endif
projects / u-boot / blobdiff