*/
#include <common.h>
+#include <fdtdec.h>
#include <asm/io.h>
#include <i2c.h>
+#include <lcd.h>
#include <netdev.h>
+#include <spi.h>
#include <asm/arch/cpu.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
#include <asm/arch/pinmux.h>
+#include <asm/arch/power.h>
#include <asm/arch/sromc.h>
+#include <asm/arch/dp_info.h>
+#include <power/pmic.h>
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_SMC911X
-static int smc9115_pre_init(void)
+#ifdef CONFIG_USB_EHCI_EXYNOS
+int board_usb_vbus_init(void)
{
- u32 smc_bw_conf, smc_bc_conf;
- int err;
-
- /* Ethernet needs data bus width of 16 bits */
- smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK)
- | SROMC_BYTE_ENABLE(CONFIG_ENV_SROM_BANK);
+ struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
+ samsung_get_base_gpio_part1();
- smc_bc_conf = SROMC_BC_TACS(0x01) | SROMC_BC_TCOS(0x01)
- | SROMC_BC_TACC(0x06) | SROMC_BC_TCOH(0x01)
- | SROMC_BC_TAH(0x0C) | SROMC_BC_TACP(0x09)
- | SROMC_BC_PMC(0x01);
+ /* Enable VBUS power switch */
+ s5p_gpio_direction_output(&gpio1->x2, 6, 1);
- /* Select and configure the SROMC bank */
- err = exynos_pinmux_config(PERIPH_ID_SROMC,
- CONFIG_ENV_SROM_BANK | PINMUX_FLAG_16BIT);
- if (err) {
- debug("SROMC not configured\n");
- return err;
- }
+ /* VBUS turn ON time */
+ mdelay(3);
- s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
return 0;
}
#endif
int board_init(void)
{
gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#ifdef CONFIG_EXYNOS_SPI
+ spi_init();
+#endif
+#ifdef CONFIG_USB_EHCI_EXYNOS
+ board_usb_vbus_init();
+#endif
return 0;
}
return 0;
}
+#if defined(CONFIG_POWER)
+int power_init_board(void)
+{
+ if (pmic_init(I2C_PMIC))
+ return -1;
+ else
+ return 0;
+}
+#endif
+
void dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
PHYS_SDRAM_8_SIZE);
}
+#ifdef CONFIG_OF_CONTROL
+static int decode_sromc(const void *blob, struct fdt_sromc *config)
+{
+ int err;
+ int node;
+
+ node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
+ if (node < 0) {
+ debug("Could not find SROMC node\n");
+ return node;
+ }
+
+ config->bank = fdtdec_get_int(blob, node, "bank", 0);
+ config->width = fdtdec_get_int(blob, node, "width", 2);
+
+ err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
+ FDT_SROM_TIMING_COUNT);
+ if (err < 0) {
+ debug("Could not decode SROMC configuration\n");
+ return -FDT_ERR_NOTFOUND;
+ }
+
+ return 0;
+}
+#endif
+
int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_SMC911X
- if (smc9115_pre_init())
+ u32 smc_bw_conf, smc_bc_conf;
+ struct fdt_sromc config;
+ fdt_addr_t base_addr;
+ int node;
+
+#ifdef CONFIG_OF_CONTROL
+ node = decode_sromc(gd->fdt_blob, &config);
+ if (node < 0) {
+ debug("%s: Could not find sromc configuration\n", __func__);
+ return 0;
+ }
+ node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
+ if (node < 0) {
+ debug("%s: Could not find lan9215 configuration\n", __func__);
+ return 0;
+ }
+
+ /* We now have a node, so any problems from now on are errors */
+ base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
+ if (base_addr == FDT_ADDR_T_NONE) {
+ debug("%s: Could not find lan9215 address\n", __func__);
return -1;
- return smc911x_initialize(0, CONFIG_SMC911X_BASE);
+ }
+#else
+ /* Non-FDT configuration - bank number and timing parameters*/
+ config.bank = CONFIG_ENV_SROM_BANK;
+ config.width = 2;
+
+ config.timing[FDT_SROM_TACS] = 0x01;
+ config.timing[FDT_SROM_TCOS] = 0x01;
+ config.timing[FDT_SROM_TACC] = 0x06;
+ config.timing[FDT_SROM_TCOH] = 0x01;
+ config.timing[FDT_SROM_TAH] = 0x0C;
+ config.timing[FDT_SROM_TACP] = 0x09;
+ config.timing[FDT_SROM_PMC] = 0x01;
+ base_addr = CONFIG_SMC911X_BASE;
+#endif
+
+ /* Ethernet needs data bus width of 16 bits */
+ if (config.width != 2) {
+ debug("%s: Unsupported bus width %d\n", __func__,
+ config.width);
+ return -1;
+ }
+ smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
+ | SROMC_BYTE_ENABLE(config.bank);
+
+ smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |\
+ SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |\
+ SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |\
+ SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |\
+ SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |\
+ SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |\
+ SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
+
+ /* Select and configure the SROMC bank */
+ exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
+ s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
+ return smc911x_initialize(0, base_addr);
#endif
return 0;
}
return 0;
}
-#ifdef CONFIG_SYS_I2C_INIT_BOARD
-static int board_i2c_init(void)
-{
- int i, err;
-
- for (i = 0; i < CONFIG_MAX_I2C_NUM; i++) {
- err = exynos_pinmux_config((PERIPH_ID_I2C0 + i),
- PINMUX_FLAG_NONE);
- if (err) {
- debug("I2C%d not configured\n", (PERIPH_ID_I2C0 + i));
- return err;
- }
- }
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
- return 0;
-}
-#endif
-
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
return err;
}
#ifdef CONFIG_SYS_I2C_INIT_BOARD
- err = board_i2c_init();
+ board_i2c_init(gd->fdt_blob);
#endif
return err;
}
#endif
+
+void cfg_lcd_gpio(void)
+{
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+
+ /* For Backlight */
+ s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
+ s5p_gpio_set_value(&gpio1->b2, 0, 1);
+
+ /* LCD power on */
+ s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
+ s5p_gpio_set_value(&gpio1->x1, 5, 1);
+
+ /* Set Hotplug detect for DP */
+ s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));
+}
+
+vidinfo_t panel_info = {
+ .vl_freq = 60,
+ .vl_col = 2560,
+ .vl_row = 1600,
+ .vl_width = 2560,
+ .vl_height = 1600,
+ .vl_clkp = CONFIG_SYS_LOW,
+ .vl_hsp = CONFIG_SYS_LOW,
+ .vl_vsp = CONFIG_SYS_LOW,
+ .vl_dp = CONFIG_SYS_LOW,
+ .vl_bpix = 4, /* LCD_BPP = 2^4, for output conosle on LCD */
+
+ /* wDP panel timing infomation */
+ .vl_hspw = 32,
+ .vl_hbpd = 80,
+ .vl_hfpd = 48,
+
+ .vl_vspw = 6,
+ .vl_vbpd = 37,
+ .vl_vfpd = 3,
+ .vl_cmd_allow_len = 0xf,
+
+ .win_id = 3,
+ .cfg_gpio = cfg_lcd_gpio,
+ .backlight_on = NULL,
+ .lcd_power_on = NULL,
+ .reset_lcd = NULL,
+ .dual_lcd_enabled = 0,
+
+ .init_delay = 0,
+ .power_on_delay = 0,
+ .reset_delay = 0,
+ .interface_mode = FIMD_RGB_INTERFACE,
+ .dp_enabled = 1,
+};
+
+static struct edp_device_info edp_info = {
+ .disp_info = {
+ .h_res = 2560,
+ .h_sync_width = 32,
+ .h_back_porch = 80,
+ .h_front_porch = 48,
+ .v_res = 1600,
+ .v_sync_width = 6,
+ .v_back_porch = 37,
+ .v_front_porch = 3,
+ .v_sync_rate = 60,
+ },
+ .lt_info = {
+ .lt_status = DP_LT_NONE,
+ },
+ .video_info = {
+ .master_mode = 0,
+ .bist_mode = DP_DISABLE,
+ .bist_pattern = NO_PATTERN,
+ .h_sync_polarity = 0,
+ .v_sync_polarity = 0,
+ .interlaced = 0,
+ .color_space = COLOR_RGB,
+ .dynamic_range = VESA,
+ .ycbcr_coeff = COLOR_YCBCR601,
+ .color_depth = COLOR_8,
+ },
+};
+
+static struct exynos_dp_platform_data dp_platform_data = {
+ .phy_enable = set_dp_phy_ctrl,
+ .edp_dev_info = &edp_info,
+};
+
+void init_panel_info(vidinfo_t *vid)
+{
+ vid->rgb_mode = MODE_RGB_P,
+
+ exynos_set_dp_platform_data(&dp_platform_data);
+}
projects / u-boot / blobdiff