udelay(1000);
#endif
#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
- miiphy_reset(0x0); /* reset PHY */
- miiphy_write(0, PHY_MIPSCR, 0xf028); /* change PHY address to 0x02 */
- miiphy_write(0x02, PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
+ /* reset PHY */
+ miiphy_reset("FCC1 ETHERNET", 0x0);
+
+ /* change PHY address to 0x02 */
+ bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028);
+
+ bb_miiphy_write(NULL, 0x02, PHY_BMCR,
+ PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
#endif /* CONFIG_MII */
}
get_sys_info (&sysinfo);
+#ifdef CONFIG_SBC8560
printf ("Board: Wind River SBC8560 Board\n");
+#else
+ printf ("Board: Wind River SBC8540 Board\n");
+#endif
printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000);
printf ("\tCCB: %lu MHz\n", sysinfo.freqSystemBus / 1000000);
printf ("\tDDR: %lu MHz\n", sysinfo.freqSystemBus / 2000000);
long dram_size = 0;
extern long spd_sdram (void);
volatile immap_t *immap = (immap_t *)CFG_IMMR;
+#if 0
#if !defined(CONFIG_RAM_AS_FLASH)
volatile ccsr_lbc_t *lbc= &immap->im_lbc;
sys_info_t sysinfo;
uint temp_lbcdll = 0;
#endif
+#endif /* 0 */
#if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL)
volatile ccsr_gur_t *gur= &immap->im_gur;
#endif
dram_size = fixed_sdram ();
#endif
-#if XXX
+#if 0
#if !defined(CONFIG_RAM_AS_FLASH) /* LocalBus SDRAM is not emulating flash */
get_sys_info(&sysinfo);
/* if localbus freq is less than 66Mhz,we use bypass mode,otherwise use DLL */