* Added VIA configuration table

[u-boot] / board / shannon / shannon.c

diff --git a/board/shannon/shannon.c b/board/shannon/shannon.c
index a55626d1d3250f63c84f0e990aeff9b2a1359af0..8cd1fc34c63b5f235ed34cfc25948aa039ee38ae 100644 (file)
--- a/board/shannon/shannon.c
+++ b/board/shannon/shannon.c
@@ -24,8 +24,7 @@
 
 #include <common.h>
 
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -33,37 +32,35 @@
 
 int board_init (void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        /* memory and cpu-speed are setup before relocation */
        /* but if we use InfernoLoader, we must do some inits here */
 
 #ifdef CONFIG_INFERNO
        {
-        unsigned long temp;
-        __asm__ __volatile__(/* disable MMU, enable icache */
-                             "mrc p15, 0, %0, c1, c0\n"
-                             "bic %0, %0, #0x00002000\n"
-                             "bic %0, %0, #0x0000000f\n"
-                             "orr %0, %0, #0x00001000\n"
-                             "orr %0, %0, #0x00000002\n"
-                             "mcr p15, 0, %0, c1, c0\n"
-                             /* flush caches */
-                             "mov %0, #0\n"
-                             "mcr p15, 0, %0, c7, c7, 0\n"
-                             "mcr p15, 0, %0, c8, c7, 0\n"
-                             : "=r" (temp)
-                             :
-                             : "memory");
-        /* setup PCMCIA timing */
-        temp = 0xa0000018;
-        *(unsigned long *)temp = 0x00060006;
+       unsigned long temp;
+       __asm__ __volatile__(/* disable MMU, enable icache */
+                            "mrc p15, 0, %0, c1, c0\n"
+                            "bic %0, %0, #0x00002000\n"
+                            "bic %0, %0, #0x0000000f\n"
+                            "orr %0, %0, #0x00001000\n"
+                            "orr %0, %0, #0x00000002\n"
+                            "mcr p15, 0, %0, c1, c0\n"
+                            /* flush caches */
+                            "mov %0, #0\n"
+                            "mcr p15, 0, %0, c7, c7, 0\n"
+                            "mcr p15, 0, %0, c8, c7, 0\n"
+                            : "=r" (temp)
+                            :
+                            : "memory");
+       /* setup PCMCIA timing */
+       temp = 0xa0000018;
+       *(unsigned long *)temp = 0x00060006;
 
        }
-#endif /* CONFIG_INIT_CRITICAL */
+#endif /* CONFIG_INFERNO */
 
        /* arch number for shannon */
-       gd->bd->bi_arch_number = 97;
+       gd->bd->bi_arch_number = MACH_TYPE_SHANNON;
 
        /* adress of boot parameters */
        gd->bd->bi_boot_params = 0xc0000100;
@@ -75,7 +72,6 @@ int dram_init (void)
 {
 #if defined(PHYS_SDRAM_1) || defined(PHYS_SDRAM_2) || \
     defined(PHYS_SDRAM_3) || defined(PHYS_SDRAM_4)
-       DECLARE_GLOBAL_DATA_PTR;
        bd_t *bd = gd->bd;
 #endif