volatile iop8xx_t *iop = &immap->im_ioport;
timers->cpmt_tgcr &= 0x0FFF; SYNC; /* Disable Timer 4 */
- immap->im_cpm.cp_scc[4].scc_gsmrl = 0x0; SYNC; /* Disable SCC4 */
+ immap->im_cpm.cp_scc[3].scc_gsmrl = 0x0; SYNC; /* Disable SCC4 */
iop->iop_pdpar &= 0x3FFF; SYNC; /* Disable SAR and UTOPIA */
if ( atmMemInit() != OK ) return ERROR;
volatile iop8xx_t *iop = &immap->im_ioport;
timers->cpmt_tgcr &= 0x0FFF; SYNC; /* Disable Timer 4 */
- immap->im_cpm.cp_scc[4].scc_gsmrl = 0x0; SYNC; /* Disable SCC4 */
+ immap->im_cpm.cp_scc[3].scc_gsmrl = 0x0; SYNC; /* Disable SCC4 */
iop->iop_pdpar &= 0x3FFF; SYNC; /* Disable SAR and UTOPIA */
g_atm.loaded = FALSE;
}
/* 11 = divide by 7 */
/* */
/* Note that the UTOPIA clock must be programmed as to operate */
- /* within the range SYSCLK/10 .. 50Mhz. */
+ /* within the range SYSCLK/10 .. 50MHz. */
/*-----------------------------------------------------------------*/
car->car_sccr &= 0xFFFFFFE0;
car->car_sccr |= 0x00000008; /* UTPCLK = SYSCLK / 4 */