Drop CONFIG_HAS_DATAFLASH

[u-boot] / board / siemens / corvus / board.c

diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
index 0a11540cca01d316db4b7eb6f71fd234a2cc9360..7240c9762e22e3b9d544ccffb4a5c3901bfe6e4b 100644 (file)
--- a/board/siemens/corvus/board.c
+++ b/board/siemens/corvus/board.c
@@ -11,26 +11,49 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
-
 #include <common.h>
+#include <dm.h>
 #include <asm/io.h>
 #include <asm/arch/at91sam9g45_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
+#include <asm/arch/atmel_serial.h>
 #include <asm/arch/gpio.h>
+#include <asm/gpio.h>
 #include <asm/arch/clk.h>
-#include <lcd.h>
-#include <atmel_lcdc.h>
 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
 #include <net.h>
 #endif
+#ifndef CONFIG_DM_ETH
 #include <netdev.h>
+#endif
 #include <spi.h>
 
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+#include <asm/arch/atmel_usba_udc.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
+static void corvus_request_gpio(void)
+{
+       gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
+       gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
+       gpio_request(AT91_PIN_PD7, "d0");
+       gpio_request(AT91_PIN_PD8, "d1");
+       gpio_request(AT91_PIN_PA12, "d2");
+       gpio_request(AT91_PIN_PA13, "d3");
+       gpio_request(AT91_PIN_PA15, "d4");
+       gpio_request(AT91_PIN_PB7, "recovery button");
+       gpio_request(AT91_PIN_PD1, "USB0");
+       gpio_request(AT91_PIN_PD3, "USB1");
+       gpio_request(AT91_PIN_PB18, "SPICS1");
+       gpio_request(AT91_PIN_PB3, "SPICS0");
+       gpio_request(CONFIG_RED_LED, "red led");
+       gpio_request(CONFIG_GREEN_LED, "green led");
+}
+
 static void corvus_nand_hw_init(void)
 {
        struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
@@ -43,13 +66,13 @@ static void corvus_nand_hw_init(void)
        writel(csa, &matrix->ebicsa);
 
        /* Configure SMC CS3 for NAND/SmartMedia */
-       writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
-              AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+       writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
+              AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
               &smc->cs[3].setup);
-       writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
-              AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(2),
+       writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
+              AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
               &smc->cs[3].pulse);
-       writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(4),
+       writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
               &smc->cs[3].cycle);
        writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
               AT91_SMC_MODE_EXNW_DISABLE |
@@ -62,17 +85,20 @@ static void corvus_nand_hw_init(void)
               &smc->cs[3].mode);
 
        at91_periph_clk_enable(ATMEL_ID_PIOC);
+       at91_periph_clk_enable(ATMEL_ID_PIOA);
 
        /* Enable NandFlash */
        at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+       at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 }
 
 #if defined(CONFIG_SPL_BUILD)
 #include <spl.h>
 #include <nand.h>
 
-void at91_spl_board_init(void)
+void spl_board_init(void)
 {
+       corvus_request_gpio();
        /*
         * For on the sam9m10g45ek board, the chip wm9711 stay in the test
         * mode, so it need do some action to exit mode.
@@ -108,7 +134,7 @@ void at91_spl_board_init(void)
 }
 
 #include <asm/arch/atmel_mpddrc.h>
-static void ddr2_conf(struct atmel_mpddr *ddr2)
+static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
 {
        ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
 
@@ -141,24 +167,14 @@ static void ddr2_conf(struct atmel_mpddr *ddr2)
 
 void mem_init(void)
 {
-       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-       struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
-       struct atmel_mpddr ddr2;
-       unsigned long csa;
+       struct atmel_mpddrc_config ddr2;
 
        ddr2_conf(&ddr2);
 
-       /* enable DDR2 clock */
-       writel(0x4, &pmc->scer);
-
-       /* Chip select 1 is for DDR2/SDRAM */
-       csa = readl(&mat->ebicsa);
-       csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
-       csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V;
-       writel(csa, &mat->ebicsa);
+       at91_system_clk_enable(AT91_PMC_DDR);
 
        /* DDRAM2 Controller initialize */
-       ddr2_init(ATMEL_BASE_CS6, &ddr2);
+       ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
 }
 #endif
 
@@ -205,28 +221,44 @@ static void corvus_macb_hw_init(void)
 int board_early_init_f(void)
 {
        at91_seriald_hw_init();
+       corvus_request_gpio();
        return 0;
 }
 
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+/* from ./arch/arm/mach-at91/armv7/sama5d3_devices.c */
+void at91_udp_hw_init(void)
+{
+       /* Enable UPLL clock */
+       at91_upll_clk_enable();
+
+       /* Enable UDPHS clock */
+       at91_periph_clk_enable(ATMEL_ID_UDPHS);
+}
+#endif
+
 int board_init(void)
 {
        /* address of boot parameters */
        gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
+       /* we have to request the gpios again after relocation */
+       corvus_request_gpio();
 #ifdef CONFIG_CMD_NAND
        corvus_nand_hw_init();
 #endif
 #ifdef CONFIG_ATMEL_SPI
        at91_spi0_hw_init(1 << 4);
 #endif
-#ifdef CONFIG_HAS_DATAFLASH
-       at91_spi0_hw_init(1 << 0);
-#endif
 #ifdef CONFIG_MACB
        corvus_macb_hw_init();
 #endif
 #ifdef CONFIG_CMD_USB
        taurus_usb_hw_init();
+#endif
+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
+       at91_udp_hw_init();
+       usba_udc_probe(&pdata);
 #endif
        return 0;
 }
@@ -238,6 +270,7 @@ int dram_init(void)
        return 0;
 }
 
+#ifndef CONFIG_DM_ETH
 int board_eth_init(bd_t *bis)
 {
        int rc = 0;
@@ -246,6 +279,7 @@ int board_eth_init(bd_t *bis)
 #endif
        return rc;
 }
+#endif
 
 /* SPI chip select control */
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
@@ -278,3 +312,12 @@ void spi_cs_deactivate(struct spi_slave *slave)
                        break;
        }
 }
+
+static struct atmel_serial_platdata at91sam9260_serial_plat = {
+       .base_addr = ATMEL_BASE_DBGU,
+};
+
+U_BOOT_DEVICE(at91sam9260_serial) = {
+       .name   = "serial_atmel",
+       .platdata = &at91sam9260_serial_plat,
+};