#include <command.h>
#include <common.h>
+#include <dm.h>
#include <asm/io.h>
#include <asm/arch/at91sam9260_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/at91sam9_sdramc.h>
+#include <asm/arch/atmel_serial.h>
#include <asm/arch/clk.h>
+#include <asm/gpio.h>
#include <linux/mtd/nand.h>
#include <atmel_mci.h>
#include <asm/arch/at91_spi.h>
#include <spi.h>
#include <net.h>
+#ifndef CONFIG_DM_ETH
#include <netdev.h>
+#endif
DECLARE_GLOBAL_DATA_PTR;
+static void taurus_request_gpio(void)
+{
+ gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
+ gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
+ gpio_request(AT91_PIN_PA25, "ena PHY");
+}
+
static void taurus_nand_hw_init(void)
{
struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
at91_periph_clk_enable(ATMEL_ID_PIOC);
at91_seriald_hw_init();
+ taurus_request_gpio();
return 0;
}
void at91_udp_hw_init(void)
{
- at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
-
/* Enable PLLB */
- writel(get_pllb_init(), &pmc->pllbr);
- while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
- ;
+ at91_pllb_clk_enable(get_pllb_init());
/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
at91_periph_clk_enable(ATMEL_ID_UDP);
/* adress of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ taurus_request_gpio();
#ifdef CONFIG_CMD_NAND
taurus_nand_hw_init();
#endif
return 0;
}
+#ifndef CONFIG_DM_ETH
int board_eth_init(bd_t *bis)
{
int rc = 0;
#endif
return rc;
}
+#endif
#if !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_BOARD_AXM)