arm: rmobile: koelsch: Fix QoS revision 0.240 and 0.320

[u-boot] / board / snmc / qs860t / qs860t.c

diff --git a/board/snmc/qs860t/qs860t.c b/board/snmc/qs860t/qs860t.c
index 17c93562173246bb550afdcaf46a5ee5d28dcee8..7ff99459b7ad480a2c59d7bce9cc3707909367b2 100644 (file)
--- a/board/snmc/qs860t/qs860t.c
+++ b/board/snmc/qs860t/qs860t.c
@@ -8,23 +8,7 @@
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -93,7 +77,7 @@ int checkboard (void)
        char buf[64];
        int i;
 
-       i = getenv_r("serial#", buf, sizeof(buf));
+       i = getenv_f("serial#", buf, sizeof(buf));
        s = (i>0) ? buf : NULL;
 
        if (!s || strncmp(s, "QS860T", 6)) {
@@ -117,7 +101,7 @@ int checkboard (void)
 
 phys_size_t initdram (int board_type)
 {
-       volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+       volatile immap_t     *immap  = (immap_t *)CONFIG_SYS_IMMR;
        volatile memctl8xx_t *memctl = &immap->im_memctl;
        long int size;
 
@@ -131,12 +115,12 @@ phys_size_t initdram (int board_type)
        /*
        * Map controller bank 2 to the SDRAM address
        */
-       memctl->memc_or2 = CFG_OR2;
-       memctl->memc_br2 = CFG_BR2;
+       memctl->memc_or2 = CONFIG_SYS_OR2;
+       memctl->memc_br2 = CONFIG_SYS_BR2;
        udelay(200);
 
        /* perform SDRAM initialization sequence */
-       memctl->memc_mbmr = CFG_16M_MBMR;
+       memctl->memc_mbmr = CONFIG_SYS_16M_MBMR;
        udelay(100);
 
        memctl->memc_mar  = 0x00000088;
@@ -155,7 +139,7 @@ phys_size_t initdram (int board_type)
        /*
        * Check for 64M SDRAM Memory Size
        */
-       size = dram_size (CFG_64M_MBMR, (ulong *)SDRAM_BASE, SDRAM_64M_MAX_SIZE);
+       size = dram_size (CONFIG_SYS_64M_MBMR, (ulong *)SDRAM_BASE, SDRAM_64M_MAX_SIZE);
        udelay (1000);
 
        /*
@@ -163,7 +147,7 @@ phys_size_t initdram (int board_type)
        */
        if (size != SDRAM_64M_MAX_SIZE) {
 #endif
-       size = dram_size (CFG_16M_MBMR, (long *)SDRAM_BASE, SDRAM_16M_MAX_SIZE);
+       size = dram_size (CONFIG_SYS_16M_MBMR, (long *)SDRAM_BASE, SDRAM_16M_MAX_SIZE);
        udelay (1000);
 #if 0
        }
@@ -184,31 +168,31 @@ phys_size_t initdram (int board_type)
        /*
        * Map the 8M Intel Flash device to chip select 1
        */
-       memctl->memc_or1 = CFG_OR1;
-       memctl->memc_br1 = CFG_BR1;
+       memctl->memc_or1 = CONFIG_SYS_OR1;
+       memctl->memc_br1 = CONFIG_SYS_BR1;
 
 
        /*
        * Map 64K NVRAM, Sipex Device, NAND Ctl Reg, and LED Ctl Reg
        * to chip select 3
        */
-       memctl->memc_or3 = CFG_OR3;
-       memctl->memc_br3 = CFG_BR3;
+       memctl->memc_or3 = CONFIG_SYS_OR3;
+       memctl->memc_br3 = CONFIG_SYS_BR3;
 
        /*
        * Map chip selects 4, 5, 6, & 7 for external expansion connector
        */
-       memctl->memc_or4 = CFG_OR4;
-       memctl->memc_br4 = CFG_BR4;
+       memctl->memc_or4 = CONFIG_SYS_OR4;
+       memctl->memc_br4 = CONFIG_SYS_BR4;
 
-       memctl->memc_or5 = CFG_OR5;
-       memctl->memc_br5 = CFG_BR5;
+       memctl->memc_or5 = CONFIG_SYS_OR5;
+       memctl->memc_br5 = CONFIG_SYS_BR5;
 
-       memctl->memc_or6 = CFG_OR6;
-       memctl->memc_br6 = CFG_BR6;
+       memctl->memc_or6 = CONFIG_SYS_OR6;
+       memctl->memc_br6 = CONFIG_SYS_BR6;
 
-       memctl->memc_or7 = CFG_OR7;
-       memctl->memc_br7 = CFG_BR7;
+       memctl->memc_or7 = CONFIG_SYS_OR7;
+       memctl->memc_br7 = CONFIG_SYS_BR7;
 
 #endif
 
@@ -227,7 +211,7 @@ phys_size_t initdram (int board_type)
 
 static long int dram_size (long int mbmr_value, long int *base, long int maxsize)
 {
-       volatile immap_t *immap  = (immap_t *)CFG_IMMR;
+       volatile immap_t *immap  = (immap_t *)CONFIG_SYS_IMMR;
        volatile memctl8xx_t *memctl = &immap->im_memctl;
 
        memctl->memc_mbmr = mbmr_value;