arm: socfpga: Add FPGA driver support for Arria 10

[u-boot] / board / sunxi / gmac.c

diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c
index d90eed48f7858c177da2507dcdde422bb6c2fdb7..69eb8ff2d921170817b0e3d12c9ad9472c75045e 100644 (file)
--- a/board/sunxi/gmac.c
+++ b/board/sunxi/gmac.c
@@ -6,18 +6,18 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/gpio.h>
 
-int sunxi_gmac_initialize(bd_t *bis)
+void eth_init_board(void)
 {
        int pin;
        struct sunxi_ccm_reg *const ccm =
                (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 
        /* Set up clock gating */
-#ifndef CONFIG_MACH_SUN6I
-       setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
-#else
+#ifdef CONFIG_SUNXI_GEN_SUN6I
        setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_RESET_OFFSET_GMAC);
        setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_GMAC);
+#else
+       setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
 #endif
 
        /* Set MII clock */
@@ -79,16 +79,4 @@ int sunxi_gmac_initialize(bd_t *bis)
        for (pin = SUNXI_GPA(26); pin <= SUNXI_GPA(27); pin++)
                sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_GMAC);
 #endif
-
-#ifdef CONFIG_DM_ETH
-       return 0;
-#else
-# ifdef CONFIG_RGMII
-       return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);
-# elif defined CONFIG_GMII
-       return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_GMII);
-# else
-       return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_MII);
-# endif
-#endif
 }