]> git.sur5r.net Git - u-boot/blobdiff - board/theobroma-systems/puma_rk3399/puma-rk3399.c
rockchip: rk3399-puma: set gpio4cd iodomain to 1.8V
[u-boot] / board / theobroma-systems / puma_rk3399 / puma-rk3399.c
index 27e3823d525c01952a2904564e87de0838329447..c6690fa06900844439589a74a3c1a71e4d1b4181 100644 (file)
@@ -8,13 +8,17 @@
 #include <dm.h>
 #include <misc.h>
 #include <spl.h>
+#include <syscon.h>
 #include <usb.h>
 #include <dm/pinctrl.h>
 #include <dm/uclass-internal.h>
+#include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/setup.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3399.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3399.h>
 #include <asm/arch/periph.h>
 #include <power/regulator.h>
 #include <u-boot/sha256.h>
@@ -180,10 +184,25 @@ static void setup_serial(void)
 #endif
 }
 
+static void setup_iodomain(void)
+{
+       const u32 GRF_IO_VSEL_GPIO4CD_SHIFT = 3;
+       struct rk3399_grf_regs *grf =
+           syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+       /*
+        * Set bit 3 in GRF_IO_VSEL so PCIE_RST# works (pin GPIO4_C6).
+        * Linux assumes that PCIE_RST# works out of the box as it probes
+        * PCIe before loading the iodomain driver.
+        */
+       rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_GPIO4CD_SHIFT);
+}
+
 int misc_init_r(void)
 {
        setup_serial();
        setup_macaddr();
+       setup_iodomain();
 
        return 0;
 }