Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'

[u-boot] / board / ti / am335x / board.c

diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index a6edc2d62706cfae061e268e00409dcb97926237..cc0442612ffe237fbde2255c330a31d80205ba37 100644 (file)
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -30,12 +30,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
-
-/* MII mode defines */
-#define MII_MODE_ENABLE                0x0
-#define RGMII_MODE_ENABLE      0x3A
-
 /* GPIO that controls power to DDR on EVM-SK */
 #define GPIO_DDR_VTT_EN                7
 
@@ -269,56 +263,8 @@ const struct dpll_params *get_dpll_ddr_params(void)
                return &dpll_ddr;
 }
 
-#endif
-
-/*
- * early system init of muxing and clocks.
- */
-void s_init(void)
+void set_uart_mux_conf(void)
 {
-       __maybe_unused struct am335x_baseboard_id header;
-
-       /*
-        * The ROM will only have set up sufficient pinmux to allow for the
-        * first 4KiB NOR to be read, we must finish doing what we know of
-        * the NOR mux in this space in order to continue.
-        */
-#ifdef CONFIG_NOR_BOOT
-       asm("stmfd      sp!, {r2 - r4}");
-       asm("movw       r4, #0x8A4");
-       asm("movw       r3, #0x44E1");
-       asm("orr        r4, r4, r3, lsl #16");
-       asm("mov        r2, #9");
-       asm("mov        r3, #8");
-       asm("gpmc_mux:  str     r2, [r4], #4");
-       asm("subs       r3, r3, #1");
-       asm("bne        gpmc_mux");
-       asm("ldmfd      sp!, {r2 - r4}");
-#endif
-
-#ifdef CONFIG_SPL_BUILD
-       /*
-        * Save the boot parameters passed from romcode.
-        * We cannot delay the saving further than this,
-        * to prevent overwrites.
-        */
-       save_omap_boot_params();
-#endif
-
-       /* WDT1 is already running when the bootloader gets control
-        * Disable it to avoid "random" resets
-        */
-       writel(0xAAAA, &wdtimer->wdtwspr);
-       while (readl(&wdtimer->wdtwwps) != 0x0)
-               ;
-       writel(0x5555, &wdtimer->wdtwspr);
-       while (readl(&wdtimer->wdtwwps) != 0x0)
-               ;
-
-#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
-       /* Setup the PLLs and the clocks for the peripherals */
-       setup_clocks_for_console();
-
 #ifdef CONFIG_SERIAL1
        enable_uart0_pin_mux();
 #endif /* CONFIG_SERIAL1 */
@@ -337,29 +283,25 @@ void s_init(void)
 #ifdef CONFIG_SERIAL6
        enable_uart5_pin_mux();
 #endif /* CONFIG_SERIAL6 */
+}
 
-       uart_soft_reset();
+void set_mux_conf_regs(void)
+{
+       __maybe_unused struct am335x_baseboard_id header;
 
-#if defined(CONFIG_NOR_BOOT)
-       /* We want our console now. */
-       gd->baudrate = CONFIG_BAUDRATE;
-       serial_init();
-       gd->have_console = 1;
-#else
-       gd = &gdata;
+       if (read_eeprom(&header) < 0)
+               puts("Could not get board ID.\n");
 
-       preloader_console_init();
-#endif
+       enable_board_pin_mux(&header);
+}
 
-       prcm_init();
+void sdram_init(void)
+{
+       __maybe_unused struct am335x_baseboard_id header;
 
        if (read_eeprom(&header) < 0)
                puts("Could not get board ID.\n");
 
-       /* Enable RTC32K clock */
-       rtc32k_enable();
-
-       enable_board_pin_mux(&header);
        if (board_is_evm_sk(&header)) {
                /*
                 * EVM SK 1.2A and later use gpio0_7 to enable DDR3.
@@ -383,8 +325,8 @@ void s_init(void)
        else
                config_ddr(266, MT47H128M16RT25E_IOCTRL_VALUE, &ddr2_data,
                           &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0);
-#endif
 }
+#endif
 
 /*
  * Basic board specific setup.  Pinmux has been handled already.
@@ -397,7 +339,7 @@ int board_init(void)
                STNOR_GPMC_CONFIG5, STNOR_GPMC_CONFIG6, STNOR_GPMC_CONFIG7 };
 #endif
 
-       gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 
        gpmc_init();
 
@@ -514,7 +456,7 @@ int board_eth_init(bd_t *bis)
                cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
                                PHY_INTERFACE_MODE_MII;
        } else {
-               writel(RGMII_MODE_ENABLE, &cdev->miisel);
+               writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel);
                cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
                                PHY_INTERFACE_MODE_RGMII;
        }