/*
- * (C) Copyright 2004-2008
+ * (C) Copyright 2004-2011
* Texas Instruments, <www.ti.com>
*
* Author :
#include <status_led.h>
#endif
#include <twl4030.h>
+#include <linux/mtd/nand.h>
#include <asm/io.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mux.h>
+#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
-#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
#include <asm/mach-types.h>
+#include "beagle.h"
+#include <command.h>
+
#ifdef CONFIG_USB_EHCI
#include <usb.h>
-#include <asm/arch/clocks.h>
-#include <asm/arch/clocks_omap3.h>
-#include <asm/arch/ehci_omap3.h>
-/* from drivers/usb/host/ehci-core.h */
-extern struct ehci_hccr *hccr;
-extern volatile struct ehci_hcor *hcor;
+#include <asm/ehci-omap.h>
#endif
-#include "beagle.h"
-
-#define pr_debug(fmt, args...) debug(fmt, ##args)
#define TWL4030_I2C_BUS 0
#define EXPANSION_EEPROM_I2C_BUS 1
#define BBTOYS_WIFI 0x01000B00
#define BBTOYS_VGA 0x02000B00
#define BBTOYS_LCD 0x03000B00
+#define BCT_BRETTL3 0x01000F00
+#define BCT_BRETTL4 0x02000F00
#define BEAGLE_NO_EEPROM 0xffffffff
DECLARE_GLOBAL_DATA_PTR;
* GPIO173, GPIO172, GPIO171: 1 0 1 => C4
* GPIO173, GPIO172, GPIO171: 0 0 0 => xM
*/
-int get_board_revision(void)
+static int get_board_revision(void)
{
int revision;
- if (!omap_request_gpio(171) &&
- !omap_request_gpio(172) &&
- !omap_request_gpio(173)) {
+ if (!gpio_request(171, "") &&
+ !gpio_request(172, "") &&
+ !gpio_request(173, "")) {
- omap_set_gpio_direction(171, 1);
- omap_set_gpio_direction(172, 1);
- omap_set_gpio_direction(173, 1);
+ gpio_direction_input(171);
+ gpio_direction_input(172);
+ gpio_direction_input(173);
- revision = omap_get_gpio_datain(173) << 2 |
- omap_get_gpio_datain(172) << 1 |
- omap_get_gpio_datain(171);
-
- omap_free_gpio(171);
- omap_free_gpio(172);
- omap_free_gpio(173);
+ revision = gpio_get_value(173) << 2 |
+ gpio_get_value(172) << 1 |
+ gpio_get_value(171);
} else {
printf("Error: unable to acquire board revision GPIOs\n");
revision = -1;
return revision;
}
+#ifdef CONFIG_SPL_BUILD
+/*
+ * Routine: get_board_mem_timings
+ * Description: If we use SPL then there is no x-loader nor config header
+ * so we have to setup the DDR timings ourself on both banks.
+ */
+void get_board_mem_timings(struct board_sdrc_timings *timings)
+{
+ int pop_mfr, pop_id;
+
+ /*
+ * We need to identify what PoP memory is on the board so that
+ * we know what timings to use. If we can't identify it then
+ * we know it's an xM. To map the ID values please see nand_ids.c
+ */
+ identify_nand_chip(&pop_mfr, &pop_id);
+
+ timings->mr = MICRON_V_MR_165;
+ switch (get_board_revision()) {
+ case REVISION_C4:
+ if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
+ /* 512MB DDR */
+ timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
+ timings->ctrla = NUMONYX_V_ACTIMA_165;
+ timings->ctrlb = NUMONYX_V_ACTIMB_165;
+ timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+ break;
+ } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
+ /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
+ timings->mcfg = MICRON_V_MCFG_165(128 << 20);
+ timings->ctrla = MICRON_V_ACTIMA_165;
+ timings->ctrlb = MICRON_V_ACTIMB_165;
+ timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+ break;
+ } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
+ /* Beagleboard Rev C5, 256MB DDR */
+ timings->mcfg = MICRON_V_MCFG_200(256 << 20);
+ timings->ctrla = MICRON_V_ACTIMA_200;
+ timings->ctrlb = MICRON_V_ACTIMB_200;
+ timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
+ break;
+ }
+ case REVISION_XM_A:
+ case REVISION_XM_B:
+ case REVISION_XM_C:
+ if (pop_mfr == 0) {
+ /* 256MB DDR */
+ timings->mcfg = MICRON_V_MCFG_200(256 << 20);
+ timings->ctrla = MICRON_V_ACTIMA_200;
+ timings->ctrlb = MICRON_V_ACTIMB_200;
+ timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
+ } else {
+ /* 512MB DDR */
+ timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
+ timings->ctrla = NUMONYX_V_ACTIMA_165;
+ timings->ctrlb = NUMONYX_V_ACTIMB_165;
+ timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+ }
+ break;
+ default:
+ /* Assume 128MB and Micron/165MHz timings to be safe */
+ timings->mcfg = MICRON_V_MCFG_165(128 << 20);
+ timings->ctrla = MICRON_V_ACTIMA_165;
+ timings->ctrlb = MICRON_V_ACTIMB_165;
+ timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+ }
+}
+#endif
+
/*
* Routine: get_expansion_id
* Description: This function checks for expansion board by checking I2C
* bus 1 for the availability of an AT24C01B serial EEPROM.
* returns the device_vendor field from the EEPROM
*/
-unsigned int get_expansion_id(void)
+static unsigned int get_expansion_id(void)
{
i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
return expansion_config.device_vendor;
}
+#ifdef CONFIG_VIDEO_OMAP3
+/*
+ * Configure DSS to display background color on DVID
+ * Configure VENC to display color bar on S-Video
+ */
+static void beagle_display_init(void)
+{
+ omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
+ switch (get_board_revision()) {
+ case REVISION_AXBX:
+ case REVISION_CX:
+ case REVISION_C4:
+ omap3_dss_panel_config(&dvid_cfg);
+ break;
+ case REVISION_XM_A:
+ case REVISION_XM_B:
+ case REVISION_XM_C:
+ default:
+ omap3_dss_panel_config(&dvid_cfg_xm);
+ break;
+ }
+}
+
+/*
+ * Enable DVI power
+ */
+static void beagle_dvi_pup(void)
+{
+ uchar val;
+
+ switch (get_board_revision()) {
+ case REVISION_AXBX:
+ case REVISION_CX:
+ case REVISION_C4:
+ case REVISION_XM_A:
+ gpio_request(170, "");
+ gpio_direction_output(170, 0);
+ gpio_set_value(170, 1);
+ break;
+ case REVISION_XM_B:
+ case REVISION_XM_C:
+ default:
+ #define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3)
+ #define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6)
+
+ i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
+ val |= 4;
+ i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
+
+ i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
+ val |= 4;
+ i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
+ break;
+ }
+}
+#endif
+
/*
* Routine: misc_init_r
* Description: Configure board specific parts
TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
TWL4030_PM_RECEIVER_DEV_GRP_P1);
break;
+ case REVISION_XM_C:
+ printf("Beagle xM Rev C\n");
+ setenv("beaglerev", "xMC");
+ MUX_BEAGLE_XM();
+ /* Set VAUX2 to 1.8V for EHCI PHY */
+ twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
+ TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
+ TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
+ TWL4030_PM_RECEIVER_DEV_GRP_P1);
+ break;
default:
printf("Beagle unknown 0x%02x\n", get_board_revision());
MUX_BEAGLE_XM();
case BBTOYS_LCD:
printf("Recognized BeagleBoardToys LCD board\n");
break;;
+ case BCT_BRETTL3:
+ printf("Recognized bct electronic GmbH brettl3 board\n");
+ break;
+ case BCT_BRETTL4:
+ printf("Recognized bct electronic GmbH brettl4 board\n");
+ break;
case BEAGLE_NO_EEPROM:
printf("No EEPROM on expansion board\n");
setenv("buddy", "none");
setenv(expansion_config.env_var, expansion_config.env_setting);
twl4030_power_init();
- twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
-
- /* Configure GPIOs to output */
- writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
- writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
- GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
+ switch (get_board_revision()) {
+ case REVISION_XM_A:
+ case REVISION_XM_B:
+ twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
+ break;
+ default:
+ twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
+ break;
+ }
- /* Set GPIOs */
+ /* Set GPIO states before they are made outputs */
writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
&gpio6_base->setdataout);
writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
+ /* Configure GPIOs to output */
+ writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
+ writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
+ GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
+
dieid_num_r();
+#ifdef CONFIG_VIDEO_OMAP3
+ beagle_dvi_pup();
+ beagle_display_init();
+ omap3_dss_enable();
+#endif
+
return 0;
}
MUX_BEAGLE();
}
-#ifdef CONFIG_GENERIC_MMC
+#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
- omap_mmc_init(0);
+ omap_mmc_init(0, 0, 0);
return 0;
}
#endif
-#ifdef CONFIG_USB_EHCI
-
-#define GPIO_PHY_RESET 147
-
-/* Reset is needed otherwise the kernel-driver will throw an error. */
-int ehci_hcd_stop(void)
-{
- pr_debug("Resetting OMAP3 EHCI\n");
- omap_set_gpio_dataout(GPIO_PHY_RESET, 0);
- writel(OMAP_UHH_SYSCONFIG_SOFTRESET, OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
- return 0;
-}
-
+#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
/* Call usb_stop() before starting the kernel */
void show_boot_progress(int val)
{
- if(val == 15)
+ if (val == BOOTSTAGE_ID_RUN_OS)
usb_stop();
}
-/*
- * Initialize the OMAP3 EHCI controller and PHY on the BeagleBoard.
- * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37.
- * See there for additional Copyrights.
- */
-int ehci_hcd_init(void)
-{
- pr_debug("Initializing OMAP3 ECHI\n");
-
- /* Put the PHY in RESET */
- omap_request_gpio(GPIO_PHY_RESET);
- omap_set_gpio_direction(GPIO_PHY_RESET, 0);
- omap_set_gpio_dataout(GPIO_PHY_RESET, 0);
+static struct omap_usbhs_board_data usbhs_bdata = {
+ .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+ .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
- /* Hold the PHY in RESET for enough time till DIR is high */
- /* Refer: ISSUE1 */
- udelay(10);
-
- struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
- /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
- sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
- /*
- * Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
- * and USBHOST_120M_FCLK (USBHOST_FCLK2)
- */
- sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
- /* Enable USBTTL_ICLK */
- sr32(&prcm_base->iclken3_core, 2, 1, 1);
- /* Enable USBTTL_FCLK */
- sr32(&prcm_base->fclken3_core, 2, 1, 1);
- pr_debug("USB clocks enabled\n");
-
- /* perform TLL soft reset, and wait until reset is complete */
- writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
- OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
- /* Wait for TLL reset to complete */
- while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS)
- & OMAP_USBTLL_SYSSTATUS_RESETDONE));
- pr_debug("TLL reset done\n");
-
- writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
- OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
- OMAP_USBTLL_SYSCONFIG_CACTIVITY,
- OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
-
- /* Put UHH in NoIdle/NoStandby mode */
- writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP
- | OMAP_UHH_SYSCONFIG_SIDLEMODE
- | OMAP_UHH_SYSCONFIG_CACTIVITY
- | OMAP_UHH_SYSCONFIG_MIDLEMODE,
- OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
-
- /* setup burst configurations */
- writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
- | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
- | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN,
- OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG);
-
- /*
- * Refer ISSUE1:
- * Hold the PHY in RESET for enough time till
- * PHY is settled and ready
- */
- udelay(10);
- omap_set_gpio_dataout(GPIO_PHY_RESET, 1);
-
- hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE);
- hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10);
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+ return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
+}
- pr_debug("OMAP3 EHCI init done\n");
- return 0;
+int ehci_hcd_stop(int index)
+{
+ return omap_ehci_hcd_stop();
}
#endif /* CONFIG_USB_EHCI */
projects / u-boot / blobdiff