DECLARE_GLOBAL_DATA_PTR;
+#if defined(CONFIG_TI_AEMIF)
static struct aemif_config aemif_configs[] = {
{ /* CS0 */
.mode = AEMIF_MODE_NAND,
.width = AEMIF_WIDTH_8,
},
};
+#endif
int dram_init(void)
{
gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
- aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
- if (ddr3_size)
- ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
+#if defined(CONFIG_TI_AEMIF)
+ if (!board_is_k2g_ice())
+ aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
+#endif
+
+ if (!board_is_k2g_ice()) {
+ if (ddr3_size)
+ ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
+ else
+ ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE,
+ gd->ram_size >> 30);
+ }
+
return 0;
}
}
#endif
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+#ifdef CONFIG_OF_BOARD_SETUP
int ft_board_setup(void *blob, bd_t *bd)
{
int lpae;
ddr3_check_ecc_int(KS2_DDR3A_EMIF_CTRL_BASE);
}
+#endif /* CONFIG_OF_BOARD_SETUP */
+
+#if defined(CONFIG_DTB_RESELECT)
+int __weak embedded_dtb_select(void)
+{
+ return 0;
+}
#endif