SPDX: Convert all of our single license tags to Linux Kernel style

[u-boot] / board / ti / ks2_evm / board_k2e.c

diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
index 43dfc48a53da2085f699450c698dd34af2d71163..f86a8363c4761f038f4ce49fbfc4dd903dd01119 100644 (file)
--- a/board/ti/ks2_evm/board_k2e.c
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -1,10 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * K2E EVM : Board initialization
  *
  * (C) Copyright 2014
  *     Texas Instruments Incorporated, <www.ti.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #include <common.h>
@@ -12,33 +11,84 @@
 #include <asm/arch/hardware.h>
 #include <asm/ti-common/keystone_net.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
-unsigned int external_clk[ext_clk_count] = {
-       [sys_clk]       = 100000000,
-       [alt_core_clk]  = 100000000,
-       [pa_clk]        = 100000000,
-       [ddr3_clk]      = 100000000,
-       [mcm_clk]       = 312500000,
-       [pcie_clk]      = 100000000,
-       [sgmii_clk]     = 156250000,
-       [xgmii_clk]     = 156250000,
-       [usb_clk]       = 100000000,
+unsigned int get_external_clk(u32 clk)
+{
+       unsigned int clk_freq;
+
+       switch (clk) {
+       case sys_clk:
+               clk_freq = 100000000;
+               break;
+       case alt_core_clk:
+               clk_freq = 100000000;
+               break;
+       case pa_clk:
+               clk_freq = 100000000;
+               break;
+       case ddr3a_clk:
+               clk_freq = 100000000;
+               break;
+       default:
+               clk_freq = 0;
+               break;
+       }
+
+       return clk_freq;
+}
+
+static struct pll_init_data core_pll_config[NUM_SPDS] = {
+       [SPD800]        = CORE_PLL_800,
+       [SPD850]        = CORE_PLL_850,
+       [SPD1000]       = CORE_PLL_1000,
+       [SPD1250]       = CORE_PLL_1250,
+       [SPD1350]       = CORE_PLL_1350,
+       [SPD1400]       = CORE_PLL_1400,
+       [SPD1500]       = CORE_PLL_1500,
 };
 
-static struct pll_init_data core_pll_config[] = {
-       CORE_PLL_800,
-       CORE_PLL_850,
-       CORE_PLL_1000,
-       CORE_PLL_1250,
-       CORE_PLL_1350,
-       CORE_PLL_1400,
-       CORE_PLL_1500,
+/* DEV and ARM speed definitions as specified in DEVSPEED register */
+int speeds[DEVSPEED_NUMSPDS] = {
+       SPD850,
+       SPD1000,
+       SPD1250,
+       SPD1350,
+       SPD1400,
+       SPD1500,
+       SPD1400,
+       SPD1350,
+       SPD1250,
+       SPD1000,
+       SPD850,
+       SPD800,
+};
+
+s16 divn_val[16] = {
+       0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 };
 
 static struct pll_init_data pa_pll_config =
        PASS_PLL_1000;
 
+struct pll_init_data *get_pll_init_data(int pll)
+{
+       int speed;
+       struct pll_init_data *data;
+
+       switch (pll) {
+       case MAIN_PLL:
+               speed = get_max_dev_speed(speeds);
+               data = &core_pll_config[speed];
+               break;
+       case PASS_PLL:
+               data = &pa_pll_config;
+               break;
+       default:
+               data = NULL;
+       }
+
+       return data;
+}
+
 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
 struct eth_priv_t eth_priv_cfg[] = {
        {
@@ -47,6 +97,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 0,
                .slave_port      = 1,
                .sgmii_link_type = SGMII_LINK_MAC_PHY,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name        = "K2E_EMAC1",
@@ -54,6 +105,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 1,
                .slave_port      = 2,
                .sgmii_link_type = SGMII_LINK_MAC_PHY,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name        = "K2E_EMAC2",
@@ -61,6 +113,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 2,
                .slave_port      = 3,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name        = "K2E_EMAC3",
@@ -68,6 +121,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 3,
                .slave_port      = 4,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name        = "K2E_EMAC4",
@@ -75,6 +129,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 4,
                .slave_port      = 5,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name        = "K2E_EMAC5",
@@ -82,6 +137,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 5,
                .slave_port      = 6,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name        = "K2E_EMAC6",
@@ -89,6 +145,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 6,
                .slave_port      = 7,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name        = "K2E_EMAC7",
@@ -96,6 +153,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr        = 7,
                .slave_port      = 8,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
 };
 
@@ -105,27 +163,28 @@ int get_num_eth_ports(void)
 }
 #endif
 
-#if defined(CONFIG_BOARD_EARLY_INIT_F)
-int board_early_init_f(void)
+#if defined(CONFIG_MULTI_DTB_FIT)
+int board_fit_config_name_match(const char *name)
 {
-       int speed;
+       if (!strcmp(name, "keystone-k2e-evm"))
+               return 0;
 
-       speed = get_max_dev_speed();
-       init_pll(&core_pll_config[speed]);
+       return -1;
+}
+#endif
 
-       init_pll(&pa_pll_config);
+#if defined(CONFIG_BOARD_EARLY_INIT_F)
+int board_early_init_f(void)
+{
+       init_plls();
 
        return 0;
 }
 #endif
 
 #ifdef CONFIG_SPL_BUILD
-static struct pll_init_data spl_pll_config[] = {
-       CORE_PLL_800,
-};
-
 void spl_init_keystone_plls(void)
 {
-       init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
+       init_plls();
 }
 #endif