Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging

[u-boot] / board / ti / ks2_evm / board_k2hk.c

diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
index 6fb3d2123df0a5183ec921f608735ab714f4e9e7..0bd6b86e25732ad1e8cc35f3d8f3f38bf20c6aac 100644 (file)
--- a/board/ti/ks2_evm/board_k2hk.c
+++ b/board/ti/ks2_evm/board_k2hk.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
-#include <asm/arch/emac_defs.h>
+#include <asm/ti-common/keystone_net.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -21,31 +21,53 @@ unsigned int external_clk[ext_clk_count] = {
        [tetris_clk]    =       125000000,
        [ddr3a_clk]     =       100000000,
        [ddr3b_clk]     =       100000000,
-       [mcm_clk]       =       312500000,
-       [pcie_clk]      =       100000000,
-       [sgmii_srio_clk] =      156250000,
-       [xgmii_clk]     =       156250000,
-       [usb_clk]       =       100000000,
-       [rp1_clk]       =       123456789
 };
 
-static struct pll_init_data core_pll_config[] = {
-       CORE_PLL_799,
-       CORE_PLL_999,
-       CORE_PLL_1200,
+static struct pll_init_data core_pll_config[NUM_SPDS] = {
+       [SPD800]        = CORE_PLL_799,
+       [SPD1000]       = CORE_PLL_999,
+       [SPD1200]       = CORE_PLL_1200,
+};
+
+s16 divn_val[16] = {
+       0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 };
 
 static struct pll_init_data tetris_pll_config[] = {
-       TETRIS_PLL_800,
-       TETRIS_PLL_1000,
-       TETRIS_PLL_1200,
-       TETRIS_PLL_1350,
-       TETRIS_PLL_1400,
+       [SPD800]        = TETRIS_PLL_800,
+       [SPD1000]       = TETRIS_PLL_1000,
+       [SPD1200]       = TETRIS_PLL_1200,
+       [SPD1350]       = TETRIS_PLL_1350,
+       [SPD1400]       = TETRIS_PLL_1400,
 };
 
 static struct pll_init_data pa_pll_config =
        PASS_PLL_983;
 
+struct pll_init_data *get_pll_init_data(int pll)
+{
+       int speed;
+       struct pll_init_data *data;
+
+       switch (pll) {
+       case MAIN_PLL:
+               speed = get_max_dev_speed();
+               data = &core_pll_config[speed];
+               break;
+       case TETRIS_PLL:
+               speed = get_max_arm_speed();
+               data = &tetris_pll_config[speed];
+               break;
+       case PASS_PLL:
+               data = &pa_pll_config;
+               break;
+       default:
+               data = NULL;
+       }
+
+       return data;
+}
+
 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
 struct eth_priv_t eth_priv_cfg[] = {
        {
@@ -54,6 +76,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr       = 0,
                .slave_port     = 1,
                .sgmii_link_type = SGMII_LINK_MAC_PHY,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name       = "K2HK_EMAC1",
@@ -61,6 +84,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr       = 1,
                .slave_port     = 2,
                .sgmii_link_type = SGMII_LINK_MAC_PHY,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name       = "K2HK_EMAC2",
@@ -68,6 +92,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr       = 2,
                .slave_port     = 3,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
        {
                .int_name       = "K2HK_EMAC3",
@@ -75,6 +100,7 @@ struct eth_priv_t eth_priv_cfg[] = {
                .phy_addr       = 3,
                .slave_port     = 4,
                .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+               .phy_if          = PHY_INTERFACE_MODE_SGMII,
        },
 };
 
@@ -87,16 +113,15 @@ int get_num_eth_ports(void)
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {
-       int speed;
-
-       speed = get_max_dev_speed();
-       init_pll(&core_pll_config[speed]);
-
-       init_pll(&pa_pll_config);
-
-       speed = get_max_arm_speed();
-       init_pll(&tetris_pll_config[speed]);
+       init_plls();
 
        return 0;
 }
 #endif
+
+#ifdef CONFIG_SPL_BUILD
+void spl_init_keystone_plls(void)
+{
+       init_plls();
+}
+#endif