#include <asm/arch/crm_regs.h>
#include <asm/arch/clock.h>
#include <mmc.h>
+#include <fdt_support.h>
#include <fsl_esdhc.h>
+#include <jffs2/load_kernel.h>
#include <miiphy.h>
+#include <mtd_node.h>
#include <netdev.h>
#include <i2c.h>
#include <g_dnl.h>
#include <asm/gpio.h>
+#include <usb.h>
+#include "../common/tdx-common.h"
DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE)
#define USB_PEN_GPIO 83
+#define USB_CDET_GPIO 102
static struct ddrmc_cr_setting colibri_vf_cr_settings[] = {
/* levelling */
static const iomux_v3_cfg_t usb_pads[] = {
VF610_PAD_PTD4__GPIO_83,
+ VF610_PAD_PTC29__GPIO_102,
};
int dram_init(void)
VF610_PAD_PTB23__GPIO_93,
VF610_PAD_PTB26__GPIO_96,
VF610_PAD_PTB28__GPIO_98,
- VF610_PAD_PTC29__GPIO_102,
VF610_PAD_PTC30__GPIO_103,
VF610_PAD_PTA7__GPIO_134,
};
clrsetbits_le32(&ccm->ccgr10, CCM_REG_CTRL_MASK,
CCM_CCGR10_NFC_CTRL_MASK);
-#ifdef CONFIG_CI_UDC
+#ifdef CONFIG_USB_EHCI_VF
setbits_le32(&ccm->ccgr1, CCM_CCGR1_USBC0_CTRL_MASK);
-#endif
-
-#ifdef CONFIG_USB_EHCI
setbits_le32(&ccm->ccgr7, CCM_CCGR7_USBC1_CTRL_MASK);
+
+ clrsetbits_le32(&anadig->pll3_ctrl, ANADIG_PLL3_CTRL_BYPASS |
+ ANADIG_PLL3_CTRL_POWERDOWN |
+ ANADIG_PLL3_CTRL_DIV_SELECT,
+ ANADIG_PLL3_CTRL_ENABLE);
+ clrsetbits_le32(&anadig->pll7_ctrl, ANADIG_PLL7_CTRL_BYPASS |
+ ANADIG_PLL7_CTRL_POWERDOWN |
+ ANADIG_PLL7_CTRL_DIV_SELECT,
+ ANADIG_PLL7_CTRL_ENABLE);
#endif
clrsetbits_le32(&anadig->pll5_ctrl, ANADIG_PLL5_CTRL_BYPASS |
CCM_CSCDR2_ESDHC1_EN | CCM_CSCDR2_ESDHC1_CLK_DIV(0) |
CCM_CSCDR2_NFC_EN);
clrsetbits_le32(&ccm->cscdr3, CCM_REG_CTRL_MASK,
- CCM_CSCDR3_NFC_PRE_DIV(5));
+ CCM_CSCDR3_NFC_PRE_DIV(3));
clrsetbits_le32(&ccm->cscmr2, CCM_REG_CTRL_MASK,
CCM_CSCMR2_RMII_CLK_SEL(2));
}
setbits_le32(&scsc->sosc_ctr, SCSC_SOSC_CTR_SOSC_EN);
+#ifdef CONFIG_USB_EHCI_VF
+ gpio_request(USB_CDET_GPIO, "usb-cdet-gpio");
+#endif
+
return 0;
}
return 0;
}
-int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+int ft_board_setup(void *blob, bd_t *bd)
{
- unsigned short usb_pid;
-
- put_unaligned(CONFIG_TRDX_VID, &dev->idVendor);
-
- if (is_colibri_vf61())
- usb_pid = CONFIG_TRDX_PID_COLIBRI_VF61IT;
- else
- usb_pid = CONFIG_TRDX_PID_COLIBRI_VF50IT;
+#ifdef CONFIG_FDT_FIXUP_PARTITIONS
+ static struct node_info nodes[] = {
+ { "fsl,vf610-nfc", MTD_DEV_TYPE_NAND, }, /* NAND flash */
+ };
- put_unaligned(usb_pid, &dev->idProduct);
+ /* Update partition nodes using info from mtdparts env var */
+ puts(" Updating MTD partitions...\n");
+ fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+#endif
- return 0;
+ return ft_common_board_setup(blob, bd);
}
+#endif
#ifdef CONFIG_USB_EHCI_VF
int board_ehci_hcd_init(int port)
}
return 0;
}
+
+int board_usb_phy_mode(int port)
+{
+ switch (port) {
+ case 0:
+ /*
+ * Port 0 is used only in client mode on Colibri Vybrid modules
+ * Check for state of USB client gpio pin and accordingly return
+ * USB_INIT_DEVICE or USB_INIT_HOST.
+ */
+ if (gpio_get_value(USB_CDET_GPIO))
+ return USB_INIT_DEVICE;
+ else
+ return USB_INIT_HOST;
+ case 1:
+ /* Port 1 is used only in host mode on Colibri Vybrid modules */
+ return USB_INIT_HOST;
+ default:
+ /*
+ * There are only two USB controllers on Vybrid. Ideally we will
+ * not reach here. However return USB_INIT_HOST if we do.
+ */
+ return USB_INIT_HOST;
+ }
+}
#endif