Merge branch 'next' of git://git.denx.de/u-boot

[u-boot] / board / tqc / tqm85xx / sdram.c

diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c
index b2d3185351605989dfcf06996457d8e30771eecc..baf073e5489869784f28c6335a1492c32806e52d 100644 (file)
--- a/board/tqc/tqm85xx/sdram.c
+++ b/board/tqc/tqm85xx/sdram.c
@@ -240,7 +240,7 @@ static phys_size_t sdram_setup(int casl)
         * 4. Before DDR_SDRAM_CFG[MEM_EN] set, write D3[21] to disable data
         *    training
         */
-       ddr->debug_3 |= 0x00000400;
+       ddr->debug[2] |= 0x00000400;
 
        /*
         * 5. Wait 200 micro-seconds
@@ -282,18 +282,18 @@ static phys_size_t sdram_setup(int casl)
        /*
         * 8. Clear D3[21] to re-enable data training
         */
-       ddr->debug_3 &= ~0x00000400;
+       ddr->debug[2] &= ~0x00000400;
 
        /*
         * 9. Set D2(21) to force data training to run
         */
-       ddr->debug_2 |= 0x00000400;
+       ddr->debug[1] |= 0x00000400;
 
        /*
         * 10. Poll on D2[21] until it is cleared by hardware
         */
        asm ("sync;isync;msync");
-       while (ddr->debug_2 & 0x00000400)
+       while (ddr->debug[1] & 0x00000400)
                asm ("eieio");
 
        /*
@@ -363,6 +363,12 @@ static phys_size_t sdram_setup(int casl)
        udelay (1000);
 #endif /* CONFIG_TQM8548 */
 
+       /*
+        * get_ram_size() depends on having tlbs for the DDR, but they are
+        * not yet setup because we don't know the size.  Set up a temp
+        * mapping and delete it when done.
+        */
+       setup_ddr_tlbs(CONFIG_SYS_DDR_EARLY_SIZE_MB);
        for (i = 0; i < N_DDR_CS_CONF; i++) {
                ddr->cs0_config = ddr_cs_conf[i].reg;
 
@@ -376,6 +382,7 @@ static phys_size_t sdram_setup(int casl)
                        break;
                }
        }
+       clear_ddr_tlbs(CONFIG_SYS_DDR_EARLY_SIZE_MB);
 
 #ifdef CONFIG_TQM8548
        if (i < N_DDR_CS_CONF) {