Merge branch 'master' of /home/wd/git/u-boot/master/

[u-boot] / board / tqm834x / tqm834x.c

diff --git a/board/tqm834x/tqm834x.c b/board/tqm834x/tqm834x.c
index 41b34cc6fa461616fcac9d0c02224b43505fcbd2..aea985ccc6c1a85476276ed34d2169e8fd7849bb 100644 (file)
--- a/board/tqm834x/tqm834x.c
+++ b/board/tqm834x/tqm834x.c
@@ -27,7 +27,6 @@
 #include <mpc83xx.h>
 #include <asm/mpc8349_pci.h>
 #include <i2c.h>
-#include <spd.h>
 #include <miiphy.h>
 #include <asm-ppc/mmu.h>
 #include <pci.h>
@@ -59,7 +58,6 @@ int tqm834x_num_flash_banks;
 /* External definitions */
 ulong flash_get_size (ulong base, int banknum);
 extern flash_info_t flash_info[];
-extern long spd_sdram (void);
 
 /* Local functions */
 static int detect_num_flash_banks(void);
@@ -69,7 +67,7 @@ static void set_cs_config(short cs, long config);
 static void set_ddr_config(void);
 
 /* Local variable */
-static volatile immap_t *im = (immap_t *)CFG_IMMRBAR;
+static volatile immap_t *im = (immap_t *)CFG_IMMR;
 
 /**************************************************************************
  * Board initialzation after relocation to RAM. Used to detect the number
@@ -114,7 +112,7 @@ long int initdram (int board_type)
        /* enable DDR controller */
        im->ddr.sdram_cfg = (SDRAM_CFG_MEM_EN |
                SDRAM_CFG_SREN |
-               SDRAM_CFG_SDRAM_TYPE_DDR);
+               SDRAM_CFG_SDRAM_TYPE_DDR1);
        SYNC;
 
        /* size detection */
@@ -147,15 +145,15 @@ int checkboard (void)
        volatile immap_t * immr;
        u32 w, f;
 
-       immr = (immap_t *)CFG_IMMRBAR;
-       if (!(immr->reset.rcwh & RCWH_PCIHOST)) {
+       immr = (immap_t *)CFG_IMMR;
+       if (!(immr->reset.rcwh & HRCWH_PCI_HOST)) {
                printf("PCI:   NOT in host mode..?!\n");
                return 0;
        }
 
        /* get bus width */
        w = 32;
-       if (immr->reset.rcwh & RCWH_PCI64)
+       if (immr->reset.rcwh & HRCWH_64_BIT_PCI)
                w = 64;
 
        /* get clock */
@@ -388,7 +386,7 @@ static void set_ddr_config(void) {
        /* don't enable DDR controller yet */
        im->ddr.sdram_cfg =
                SDRAM_CFG_SREN |
-               SDRAM_CFG_SDRAM_TYPE_DDR;
+               SDRAM_CFG_SDRAM_TYPE_DDR1;
        SYNC;
 
        /* Set SDRAM mode */