imx: reorganize IMX code as other SOCs

[u-boot] / board / wandboard / spl.c

diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c
index c513b22d82dfa24eb57240a74d1620911e0b2958..47082a88d5ec45812ad079b1660a386a56e8a293 100644 (file)
--- a/board/wandboard/spl.c
+++ b/board/wandboard/spl.c
@@ -11,8 +11,8 @@
 #include <asm/arch/mx6-pins.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
-#include <asm/imx-common/iomux-v3.h>
-#include <asm/imx-common/video.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/video.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <asm/arch/crm_regs.h>
@@ -188,7 +188,7 @@ static struct mx6_ddr_sysinfo mem_q = {
        .rst_to_cke     = 0x23,
        .sde_to_rst     = 0x10,
        .refsel = 1,    /* Refresh cycles at 32KHz */
-       .refr = 7,      /* 8 refresh commands per refresh cycle */
+       .refr = 3,      /* 4 refresh commands per refresh cycle */
 };
 
 static struct mx6_mmdc_calibration mx6dl_1g_mmdc_calib = {
@@ -231,7 +231,7 @@ static struct mx6_ddr_sysinfo mem_dl = {
        .rst_to_cke     = 0x23,
        .sde_to_rst     = 0x10,
        .refsel = 1,    /* Refresh cycles at 32KHz */
-       .refr = 7,      /* 8 refresh commands per refresh cycle */
+       .refr = 3,      /* 4 refresh commands per refresh cycle */
 };
 
 /* DDR 32bit 512MB */
@@ -250,7 +250,7 @@ static struct mx6_ddr_sysinfo mem_s = {
        .rst_to_cke     = 0x23,
        .sde_to_rst     = 0x10,
        .refsel = 1,    /* Refresh cycles at 32KHz */
-       .refr = 7,      /* 8 refresh commands per refresh cycle */
+       .refr = 3,      /* 4 refresh commands per refresh cycle */
 };
 
 static void ccgr_init(void)
@@ -289,8 +289,6 @@ static void spl_dram_init(void)
                mx6dq_dram_iocfg(64, &mx6dq_ddr_ioregs, &mx6dq_grp_ioregs);
                mx6_dram_cfg(&mem_q, &mx6q_2g_mmdc_calib, &h5t04g63afr);
        }
-
-       udelay(100);
 }
 
 void board_init_f(ulong dummy)