Merge branch 'next' of git://git.denx.de/u-boot-mpc83xx

[u-boot] / board / xaeniax / xaeniax.c

diff --git a/board/xaeniax/xaeniax.c b/board/xaeniax/xaeniax.c
index 26fb312fd0a5c7ab77e7df1b6eeac01fda02b94e..995c262b6c75e3daac38b06791177eea48e66b7b 100644 (file)
--- a/board/xaeniax/xaeniax.c
+++ b/board/xaeniax/xaeniax.c
@@ -9,29 +9,14 @@
  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  * Marius Groeger <mgroeger@sysgo.de>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <netdev.h>
+#include <asm/arch/pxa.h>
 
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Miscelaneous platform dependent initialisations
@@ -39,10 +24,9 @@
 
 int board_init (void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
-       /* memory and cpu-speed are setup before relocation */
-       /* so we do _nothing_ here */
+       /* We have RAM, disable cache */
+       dcache_disable();
+       icache_disable();
 
        /* arch number of xaeniax */
        gd->bd->bi_arch_number = 585;
@@ -60,19 +44,26 @@ int board_late_init(void)
        return 0;
 }
 
-
-int dram_init (void)
+int dram_init(void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
+       pxa2xx_dram_init();
+       gd->ram_size = PHYS_SDRAM_1_SIZE;
+       return 0;
+}
 
+void dram_init_banksize(void)
+{
        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-       /*      gd->bd->bi_dram[1].start = PHYS_SDRAM_2;*/
-       /*      gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;*/
-       /*      gd->bd->bi_dram[2].start = PHYS_SDRAM_3; */
-       /*      gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; */
-       /*      gd->bd->bi_dram[3].start = PHYS_SDRAM_4; */
-       /*      gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; */
+}
 
-       return 0;
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+       int rc = 0;
+#ifdef CONFIG_SMC91111
+       rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+       return rc;
 }
+#endif