Merge branch 'master' of git://git.denx.de/u-boot-avr32

[u-boot] / board / xilinx / microblaze-generic / microblaze-generic.c

diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c
index 744384c1d3a2d5efb33f21ab04c898a66ad6c584..b75e62c715d8e930fdd885629cd33da3313cd010 100644 (file)
--- a/board/xilinx/microblaze-generic/microblaze-generic.c
+++ b/board/xilinx/microblaze-generic/microblaze-generic.c
@@ -28,10 +28,11 @@
 #include <common.h>
 #include <config.h>
 #include <netdev.h>
+#include <asm/processor.h>
 #include <asm/microblaze_intc.h>
 #include <asm/asm.h>
 
-void do_reset (void)
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 #ifdef CONFIG_SYS_GPIO_0
        *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) =
@@ -41,6 +42,7 @@ void do_reset (void)
        puts ("Reseting board\n");
        asm ("bra r0");
 #endif
+       return 0;
 }
 
 int gpio_init (void)
@@ -68,14 +70,70 @@ int fsl_init2 (void) {
 }
 #endif
 
+void board_init(void)
+{
+       gpio_init();
+#ifdef CONFIG_SYS_FSL_2
+       fsl_init2();
+#endif
+}
+
 int board_eth_init(bd_t *bis)
 {
-       /*
-        * This board either has PCI NICs or uses the CPU's TSECs
-        * pci_eth_init() will return 0 if no NICs found, so in that case
-        * returning -1 will force cpu_eth_init() to be called.
-        */
+       int ret = 0;
+
+#ifdef CONFIG_XILINX_AXIEMAC
+       ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
+                                               XILINX_AXIDMA_BASEADDR);
+#endif
+
 #ifdef CONFIG_XILINX_EMACLITE
-       return xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR);
+       u32 txpp = 0;
+       u32 rxpp = 0;
+# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
+       txpp = 1;
+# endif
+# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
+       rxpp = 1;
+# endif
+       ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
+                       txpp, rxpp);
 #endif
+
+#ifdef CONFIG_XILINX_LL_TEMAC
+# ifdef XILINX_LLTEMAC_BASEADDR
+#  ifdef XILINX_LLTEMAC_FIFO_BASEADDR
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
+                       XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR);
+#  elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR
+#   if XILINX_LLTEMAC_SDMA_USE_DCR == 1
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
+                       XILINX_LL_TEMAC_M_SDMA_DCR,
+                       XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
+#   else
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
+                       XILINX_LL_TEMAC_M_SDMA_PLB,
+                       XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
+#   endif
+#  endif
+# endif
+# ifdef XILINX_LLTEMAC_BASEADDR1
+#  ifdef XILINX_LLTEMAC_FIFO_BASEADDR1
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
+                       XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1);
+#  elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1
+#   if XILINX_LLTEMAC_SDMA_USE_DCR == 1
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
+                       XILINX_LL_TEMAC_M_SDMA_DCR,
+                       XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
+#   else
+       ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
+                       XILINX_LL_TEMAC_M_SDMA_PLB,
+                       XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
+#   endif
+#  endif
+# endif
+#endif
+
+       return ret;
 }