arm: zynq: Rework FPGA initialization

[u-boot] / board / xilinx / zynq / board.c

diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index fe36cf7eff8c9891d62e1c9994fa684ea177ad56..e58c587603ab542741a470bf4204c62733ccefba 100644 (file)
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -17,23 +17,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
-    (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
-static xilinx_desc fpga;
-
-/* It can be done differently */
-static xilinx_desc fpga007s = XILINX_XC7Z007S_DESC(0x7);
-static xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
-static xilinx_desc fpga012s = XILINX_XC7Z012S_DESC(0x12);
-static xilinx_desc fpga014s = XILINX_XC7Z014S_DESC(0x14);
-static xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
-static xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
-static xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
-static xilinx_desc fpga035 = XILINX_XC7Z035_DESC(0x35);
-static xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
-static xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
-#endif
-
 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
 static struct udevice *watchdog_dev;
 #endif
@@ -52,46 +35,6 @@ int board_early_init_f(void)
 
 int board_init(void)
 {
-#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
-    (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
-       u32 idcode;
-
-       idcode = zynq_slcr_get_idcode();
-
-       switch (idcode) {
-       case XILINX_ZYNQ_7007S:
-               fpga = fpga007s;
-               break;
-       case XILINX_ZYNQ_7010:
-               fpga = fpga010;
-               break;
-       case XILINX_ZYNQ_7012S:
-               fpga = fpga012s;
-               break;
-       case XILINX_ZYNQ_7014S:
-               fpga = fpga014s;
-               break;
-       case XILINX_ZYNQ_7015:
-               fpga = fpga015;
-               break;
-       case XILINX_ZYNQ_7020:
-               fpga = fpga020;
-               break;
-       case XILINX_ZYNQ_7030:
-               fpga = fpga030;
-               break;
-       case XILINX_ZYNQ_7035:
-               fpga = fpga035;
-               break;
-       case XILINX_ZYNQ_7045:
-               fpga = fpga045;
-               break;
-       case XILINX_ZYNQ_7100:
-               fpga = fpga100;
-               break;
-       }
-#endif
-
 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
        if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
                puts("Watchdog: Not found!\n");
@@ -101,12 +44,6 @@ int board_init(void)
        }
 # endif
 
-#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
-    (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
-       fpga_init();
-       fpga_add(fpga_xilinx, &fpga);
-#endif
-
        return 0;
 }