[new uImage] Rename and move print_image_hdr() routine

[u-boot] / common / ACEX1K.c

diff --git a/common/ACEX1K.c b/common/ACEX1K.c
index 53b2f50071da7fcbc61da5199bd3f5338a71397e..76dc1664385b8ea9da322101adfa082706fc2762 100644 (file)
--- a/common/ACEX1K.c
+++ b/common/ACEX1K.c
@@ -28,20 +28,15 @@
 #include <common.h>            /* core U-Boot definitions */
 #include <ACEX1K.h>            /* ACEX device family */
 
-#if (CONFIG_FPGA & (CFG_ALTERA | CFG_ACEX1K))
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_ACEX1K)
 
 /* Define FPGA_DEBUG to get debug printf's */
-/* #define FPGA_DEBUG */
-
 #ifdef FPGA_DEBUG
 #define PRINTF(fmt,args...)    printf (fmt ,##args)
 #else
 #define PRINTF(fmt,args...)
 #endif
 
-#undef CFG_FPGA_CHECK_BUSY
-#define CFG_FPGA_PROG_FEEDBACK
-
 /* Note: The assumption is that we cannot possibly run fast enough to
  * overrun the device (the Slave Parallel mode can free run at 50MHz).
  * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
@@ -52,7 +47,7 @@
 #endif
 
 #ifndef CFG_FPGA_WAIT
-#define CFG_FPGA_WAIT 100
+#define CFG_FPGA_WAIT CFG_HZ/10                /* 100 ms */
 #endif
 
 static int ACEX1K_ps_load( Altera_desc *desc, void *buf, size_t bsize );
@@ -162,7 +157,7 @@ static int ACEX1K_ps_load (Altera_desc * desc, void *buf, size_t bsize)
                                __FUNCTION__, &fn, fn, fn->config, fn->status,
                                fn->clk, fn->data, fn->done);
 #ifdef CFG_FPGA_PROG_FEEDBACK
-               printf ("Loading FPGA Device %d (@ %ld)...\n", cookie, ts);
+               printf ("Loading FPGA Device %d...", cookie);
 #endif
 
                /*
@@ -246,7 +241,7 @@ static int ACEX1K_ps_load (Altera_desc * desc, void *buf, size_t bsize)
                CONFIG_FPGA_DELAY ();
 
 #ifdef CFG_FPGA_PROG_FEEDBACK
-               putc ('\n');                    /* terminate the dotted line */
+               putc (' ');                     /* terminate the dotted line */
 #endif
 
        /*
@@ -368,4 +363,4 @@ static int ACEX1K_ps_reloc (Altera_desc * desc, ulong reloc_offset)
 
 }
 
-#endif /* (CONFIG_FPGA & (CFG_ALTERA | CFG_ACEX1K)) */
+#endif /* CONFIG_FPGA && CONFIG_FPGA_ALTERA && CONFIG_FPGA_ACEX1K */