#endif
#include <logbuff.h>
#include <malloc.h>
+#include <mapmem.h>
#ifdef CONFIG_BITBANGMII
#include <miiphy.h>
#endif
#include <dm/root.h>
#include <linux/compiler.h>
#include <linux/err.h>
+#ifdef CONFIG_AVR32
+#include <asm/arch/mmu.h>
+#endif
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
static int initr_trap(void)
{
/*
* Setup trap handlers
*/
+#if defined(CONFIG_PPC)
trap_init(gd->relocaddr);
-
+#else
+ trap_init(CONFIG_SYS_SDRAM_BASE);
+#endif
return 0;
}
#endif
#ifdef CONFIG_PCI
static int initr_pci(void)
{
+#ifndef CONFIG_DM_PCI
pci_init();
+#endif
return 0;
}
return 0;
}
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+static int initr_noncached(void)
+{
+ noncached_init();
+ return 0;
+}
+#endif
+
#ifdef CONFIG_DM
static int initr_dm(void)
{
return 0;
}
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+static int initr_manual_reloc_cmdtable(void)
+{
+ fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
+ ll_entry_count(cmd_tbl_t, cmd));
+ return 0;
+}
+#endif
+
#if !defined(CONFIG_SYS_NO_FLASH)
static int initr_flash(void)
{
ulong flash_size = 0;
bd_t *bd = gd->bd;
- int ok;
puts("Flash: ");
- if (board_flash_wp_on()) {
+ if (board_flash_wp_on())
printf("Uninitialized - Write Protect On\n");
- /* Since WP is on, we can't find real size. Set to 0 */
- ok = 1;
- } else {
+ else
flash_size = flash_init();
- ok = flash_size > 0;
- }
- if (!ok) {
- puts("*** failed ***\n");
-#ifdef CONFIG_PPC
- /* Why does PPC do this? */
- hang();
-#endif
- return -1;
- }
+
print_size(flash_size, "");
#ifdef CONFIG_SYS_FLASH_CHECKSUM
/*
return 0;
}
-#ifdef CONFIG_HERMES
-static int initr_hermes(void)
-{
- if ((gd->board_type >> 16) == 2)
- gd->bd->bi_ethspeed = gd->board_type & 0xFFFF;
- else
- gd->bd->bi_ethspeed = 0xFFFF;
- return 0;
-}
-
-static int initr_hermes_start(void)
+#ifdef CONFIG_SYS_BOOTPARAMS_LEN
+static int initr_malloc_bootparams(void)
{
- if (gd->bd->bi_ethspeed != 0xFFFF)
- hermes_start_lxt980((int) gd->bd->bi_ethspeed);
- return 0;
-}
-#endif
-
-#ifdef CONFIG_SC3
-/* TODO: with new initcalls, move this into the driver */
-extern void sc3_read_eeprom(void);
-
-static int initr_sc3_read_eeprom(void)
-{
- sc3_read_eeprom();
+ gd->bd->bi_boot_params = (ulong)malloc(CONFIG_SYS_BOOTPARAMS_LEN);
+ if (!gd->bd->bi_boot_params) {
+ puts("WARNING: Cannot allocate space for boot parameters\n");
+ return -ENOMEM;
+ }
return 0;
}
#endif
}
#endif
-#ifdef CONFIG_DISPLAY_BOARDINFO_LATE
-static int show_model_r(void)
-{
- /* Put this here so it appears on the LCD, now it is ready */
-# ifdef CONFIG_OF_CONTROL
- const char *model;
-
- model = (char *)fdt_getprop(gd->fdt_blob, 0, "model", NULL);
- printf("Model: %s\n", model ? model : "<unknown>");
-# else
- checkboard();
-# endif
- return 0;
-}
-#endif
-
/* enable exceptions */
-#ifdef CONFIG_ARM
+#if defined(CONFIG_ARM) || defined(CONFIG_AVR32)
static int initr_enable_interrupts(void)
{
enable_interrupts();
static int initr_net(void)
{
puts("Net: ");
- eth_initialize(gd->bd);
+ eth_initialize();
#if defined(CONFIG_RESET_PHY_R)
debug("Reset Ethernet PHY\n");
reset_phy();
/* TODO: could x86/PPC have this also perhaps? */
#ifdef CONFIG_ARM
initr_caches,
+ /* Note: For Freescale LS2 SoCs, new MMU table is created in DDR.
+ * A temporary mapping of IFC high region is since removed,
+ * so environmental variables in NOR flash is not availble
+ * until board_init() is called below to remap IFC to high
+ * region.
+ */
#endif
initr_reloc_global_data,
#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
#endif
initr_barrier,
initr_malloc,
+#ifdef CONFIG_SYS_NONCACHED_MEMORY
+ initr_noncached,
+#endif
bootstage_relocate,
#ifdef CONFIG_DM
initr_dm,
initr_serial,
initr_announce,
INIT_FUNC_WATCHDOG_RESET
-#ifdef CONFIG_PPC
+#ifdef CONFIG_NEEDS_MANUAL_RELOC
+ initr_manual_reloc_cmdtable,
+#endif
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
initr_trap,
#endif
#ifdef CONFIG_ADDR_MAP
initr_flash,
#endif
INIT_FUNC_WATCHDOG_RESET
-#if defined(CONFIG_PPC) || defined(CONFIG_X86)
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86)
/* initialize higher level parts of CPU like time base and timers */
cpu_init_r,
#endif
#ifdef CONFIG_PPC
initr_spi,
#endif
-#if defined(CONFIG_X86) && defined(CONFIG_SPI)
- init_func_spi,
-#endif
#ifdef CONFIG_CMD_NAND
initr_nand,
#endif
initr_dataflash,
#endif
initr_env,
+#ifdef CONFIG_SYS_BOOTPARAMS_LEN
+ initr_malloc_bootparams,
+#endif
INIT_FUNC_WATCHDOG_RESET
initr_secondary_cpu,
-#ifdef CONFIG_SC3
- initr_sc3_read_eeprom,
-#endif
-#ifdef CONFIG_HERMES
- initr_hermes,
-#endif
#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
mac_read_from_eeprom,
#endif
#endif
console_init_r, /* fully init console as a device */
#ifdef CONFIG_DISPLAY_BOARDINFO_LATE
- show_model_r,
+ show_board_info,
#endif
#ifdef CONFIG_ARCH_MISC_INIT
arch_misc_init, /* miscellaneous arch-dependent init */
#endif
#ifdef CONFIG_MISC_INIT_R
misc_init_r, /* miscellaneous platform-dependent init */
-#endif
-#ifdef CONFIG_HERMES
- initr_hermes_start,
#endif
INIT_FUNC_WATCHDOG_RESET
#ifdef CONFIG_CMD_KGDB
initr_kgdb,
#endif
interrupt_init,
-#if defined(CONFIG_ARM) || defined(CONFIG_x86)
+#if defined(CONFIG_ARM) || defined(CONFIG_AVR32)
initr_enable_interrupts,
#endif
-#ifdef CONFIG_X86
+#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) \
+ || defined(CONFIG_M68K)
timer_init, /* initialize timer */
#endif
#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
int i;
#endif
+#ifdef CONFIG_AVR32
+ mmu_init_r(dest_addr);
+#endif
+
#if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
gd = new_gd;
#endif