Modified the DDR SDRAM clock control register to delay MCK/MCK_B 3/4 clock

[u-boot] / common / cmd_pcmcia.c

diff --git a/common/cmd_pcmcia.c b/common/cmd_pcmcia.c
index b1a594f18be47dd234ba42aa1b7c784d98c3bd90..dcd07c05e57ffbaf9a2f44b5dd2fd99e212a58c2 100644 (file)
--- a/common/cmd_pcmcia.c
+++ b/common/cmd_pcmcia.c
@@ -61,7 +61,7 @@
 
 /* -------------------------------------------------------------------- */
 
-#if    (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
 
 extern int pcmcia_on (void);
 extern int pcmcia_off (void);
@@ -93,13 +93,13 @@ U_BOOT_CMD(
                        "pinit off - power off PCMCIA socket\n"
          );
 
-#endif /* CONFIG_COMMANDS & CFG_CMD_PCMCIA */
+#endif
 
 /* -------------------------------------------------------------------- */
 
 #undef CHECK_IDE_DEVICE
 
-#if    (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
 #define        CHECK_IDE_DEVICE
 #endif