dm: spl: Allow device tree/driver model in board_init_f()

[u-boot] / common / spl / spl.c

diff --git a/common/spl/spl.c b/common/spl/spl.c
index cd75bbc4ced967b96d09aad4f5311a65ee207ec7..074c41d5ad2cd2ef3642cc2b6a71aa3f4c4234c5 100644 (file)
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -101,10 +101,22 @@ void spl_parse_image_header(const struct image_header *header)
                        (int)sizeof(spl_image.name), spl_image.name,
                        spl_image.load_addr, spl_image.size);
        } else {
+#ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE
+               /*
+                * CONFIG_SPL_PANIC_ON_RAW_IMAGE is defined when the
+                * code which loads images in SPL cannot guarantee that
+                * absolutely all read errors will be reported.
+                * An example is the LPC32XX MLC NAND driver, which
+                * will consider that a completely unreadable NAND block
+                * is bad, and thus should be skipped silently.
+                */
+               panic("** no mkimage signature but raw image not supported");
+#else
                /* Signature not found - assume u-boot.bin */
                debug("mkimage signature not found - ih_magic = %x\n",
                        header->ih_magic);
                spl_set_header_raw_uboot();
+#endif
        }
 }
 
@@ -113,7 +125,7 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
        typedef void __noreturn (*image_entry_noargs_t)(void);
 
        image_entry_noargs_t image_entry =
-                       (image_entry_noargs_t) spl_image->entry_point;
+               (image_entry_noargs_t)(unsigned long)spl_image->entry_point;
 
        debug("image entry point: 0x%X\n", spl_image->entry_point);
        image_entry();
@@ -136,23 +148,50 @@ static void spl_ram_load_image(void)
 }
 #endif
 
+int spl_init(void)
+{
+       int ret;
+
+       debug("spl_init()\n");
+#if defined(CONFIG_SYS_MALLOC_F_LEN)
+       gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN;
+       gd->malloc_ptr = 0;
+#endif
+       if (IS_ENABLED(CONFIG_OF_CONTROL) &&
+                       !IS_ENABLED(CONFIG_SPL_DISABLE_OF_CONTROL)) {
+               ret = fdtdec_setup();
+               if (ret) {
+                       debug("fdtdec_setup() returned error %d\n", ret);
+                       return ret;
+               }
+       }
+       if (IS_ENABLED(CONFIG_SPL_DM)) {
+               ret = dm_init_and_scan(true);
+               if (ret) {
+                       debug("dm_init_and_scan() returned error %d\n", ret);
+                       return ret;
+               }
+       }
+       gd->flags |= GD_FLG_SPL_INIT;
+
+       return 0;
+}
+
 void board_init_r(gd_t *dummy1, ulong dummy2)
 {
        u32 boot_device;
+
        debug(">>spl:board_init_r()\n");
 
 #if defined(CONFIG_SYS_SPL_MALLOC_START)
        mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
                        CONFIG_SYS_SPL_MALLOC_SIZE);
        gd->flags |= GD_FLG_FULL_MALLOC_INIT;
-#elif defined(CONFIG_SYS_MALLOC_F_LEN)
-       gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
-       gd->malloc_ptr = 0;
-#endif
-#ifdef CONFIG_SPL_DM
-       dm_init_and_scan(true);
 #endif
-
+       if (!(gd->flags & GD_FLG_SPL_INIT)) {
+               if (spl_init())
+                       hang();
+       }
 #ifndef CONFIG_PPC
        /*
         * timer_init() does not exist on PPC systems. The timer is initialized
@@ -302,7 +341,7 @@ ulong spl_relocate_stack_gd(void)
        ulong ptr;
 
        /* Get stack position: use 8-byte alignment for ABI compliance */
-       ptr = CONFIG_SPL_STACK_R - sizeof(gd_t);
+       ptr = CONFIG_SPL_STACK_R_ADDR - sizeof(gd_t);
        ptr &= ~7;
        new_gd = (gd_t *)ptr;
        memcpy(new_gd, (void *)gd, sizeof(gd_t));