]> git.sur5r.net Git - u-boot/blobdiff - configs/B4420QDS_SPIFLASH_defconfig
arm64: zynqmp: Enable SPD ddr support for zcu102 targets
[u-boot] / configs / B4420QDS_SPIFLASH_defconfig
index 6e37669e67031c5d7124c861abc2d3914891b452..1e51e8448e6c349c2dacd53bf81f340cdf27dbe6 100644 (file)
@@ -1,14 +1,17 @@
 CONFIG_PPC=y
+CONFIG_SYS_TEXT_BASE=0xFFF40000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_B4420QDS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
 CONFIG_BOOTDELAY=10
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_HUSH_PARSER=y
+CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_SF=y
@@ -29,6 +32,7 @@ CONFIG_NETDEVICES=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y