MIPS: add MIPS Release 6 build coverage for Boston boards

[u-boot] / configs / chromebook_link_defconfig

diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index f402f8c98f9bda78ae79700b131ee9ae09125e98..f81b8dceb1f2693ef2b4b35dc57d6af40ad558d2 100644 (file)
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -1,6 +1,9 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_DEBUG_UART_BASE=0x3f8
+CONFIG_DEBUG_UART_CLOCK=1843200
 CONFIG_VENDOR_GOOGLE=y
 CONFIG_DEFAULT_DEVICE_TREE="chromebook_link"
 CONFIG_TARGET_CHROMEBOOK_LINK=y
@@ -40,9 +43,6 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_MAC_PARTITION=y
 CONFIG_ISO_PARTITION=y
 CONFIG_EFI_PARTITION=y
-CONFIG_BOOTP_BOOTPATH=y
-CONFIG_BOOTP_GATEWAY=y
-CONFIG_BOOTP_HOSTNAME=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CPU=y
@@ -50,10 +50,8 @@ CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_INTEL=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_LPC=y
-CONFIG_DEBUG_UART_BASE=0x3f8
-CONFIG_DEBUG_UART_CLOCK=1843200
-CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
 CONFIG_TIMER_EARLY=y
 CONFIG_TPM_TIS_LPC=y
 CONFIG_USB_STORAGE=y