]> git.sur5r.net Git - u-boot/blobdiff - configs/socfpga_arria5_defconfig
video: fsl_dcu_fb: Enable pixel clock after initialization
[u-boot] / configs / socfpga_arria5_defconfig
index 751769e67b129161f8c042f99fa829f54be7e28d..43c51fe94ddae1ac141a4aa4553dece4fc76afc7 100644 (file)
@@ -5,6 +5,9 @@ CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
 CONFIG_SPL_STACK_R_ADDR=0x00800000
 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
 CONFIG_FIT=y
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
 CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
@@ -40,6 +43,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y