arm: socfpga: Fix with the correct polling on bit is set

[u-boot] / configs / socfpga_sr1500_defconfig

diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index ec9c7e03af63a1b7b69b2efb2bd52842783fe59d..062afe16bccac141d1f9d2d3296554fc28798ad3 100644 (file)
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -20,10 +20,13 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SPI_LOAD=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 # CONFIG_CMD_FLASH is not set
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -43,6 +46,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
 CONFIG_FPGA_SOCFPGA=y
 CONFIG_DM_GPIO=y
 CONFIG_DWAPB_GPIO=y
+CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
@@ -53,6 +57,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
+CONFIG_DM_RESET=y
 CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
 CONFIG_USE_TINY_PRINTF=y