]> git.sur5r.net Git - u-boot/blobdiff - configs/zynq_zybo_defconfig
clk: renesas: Pass clock rate around as 64bit number internally
[u-boot] / configs / zynq_zybo_defconfig
index 138b249453c414a1aeb9affd7bb59c5993592f43..efb99b5e585fca19899481042ba9246da0644366 100644 (file)
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="zynq_zybo"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL=y
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zybo"
 CONFIG_DEBUG_UART=y
@@ -9,11 +10,11 @@ CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_PROMPT="Zynq> "
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_EEPROM=y
@@ -38,7 +39,12 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
+CONFIG_SYS_I2C_ZYNQ=y
+CONFIG_ZYNQ_I2C0=y
+CONFIG_ZYNQ_I2C1=y
+CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y