]> git.sur5r.net Git - u-boot/blobdiff - cpu/74xx_7xx/cpu.c
usb: musb: make sure the register layout is packed
[u-boot] / cpu / 74xx_7xx / cpu.c
index c265ce265af72ae3e72d2a1d60e59c965fc2bcfd..3c172779b199e3237dd92ca5378f4c8901f27192 100644 (file)
 #include <74xx_7xx.h>
 #include <asm/cache.h>
 
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#include <fdt_support.h>
+#endif
+
 #ifdef CONFIG_AMIGAONEG3SE
 #include "../board/MAI/AmigaOneG3SE/via686.h"
 #include "../board/MAI/AmigaOneG3SE/memio.h"
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 cpu_t
 get_cpu_type(void)
 {
@@ -64,7 +71,7 @@ get_cpu_type(void)
        case 0x0008:
                type = CPU_750;
 
-                if (((pvr >> 8) & 0xff) == 0x01) {
+               if (((pvr >> 8) & 0xff) == 0x01) {
                        type = CPU_750CX;       /* old CX (80100 and 8010x?)*/
                } else if (((pvr >> 8) & 0xff) == 0x22) {
                        type = CPU_750CX;       /* CX (82201,82202) and CXe (82214) */
@@ -72,17 +79,41 @@ get_cpu_type(void)
                        type = CPU_750CX;       /* CXe (83311) */
                } else if (((pvr >> 12) & 0xF) == 0x3) {
                        type = CPU_755;
-                }
+               }
+               break;
+
+       case 0x7000:
+               type = CPU_750FX;
+               break;
+
+       case 0x7002:
+               type = CPU_750GX;
                break;
 
        case 0x800C:
                type = CPU_7410;
                break;
 
-        case 0x8000:
+       case 0x8000:
                type = CPU_7450;
                break;
 
+       case 0x8001:
+               type = CPU_7455;
+               break;
+
+       case 0x8002:
+               type = CPU_7457;
+               break;
+
+       case 0x8003:
+               type = CPU_7447A;
+               break;
+
+       case 0x8004:
+               type = CPU_7448;
+               break;
+
        default:
                break;
        }
@@ -95,8 +126,6 @@ get_cpu_type(void)
 #if !defined(CONFIG_BAB7xx)
 int checkcpu (void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        uint type   = get_cpu_type();
        uint pvr    = get_pvr();
        ulong clock = gd->cpu_clk;
@@ -116,6 +145,14 @@ int checkcpu (void)
                str = "750";
                break;
 
+       case CPU_750FX:
+               str = "750FX";
+               break;
+
+       case CPU_750GX:
+               str = "750GX";
+               break;
+
        case CPU_755:
                str = "755";
                break;
@@ -124,16 +161,32 @@ int checkcpu (void)
                str = "MPC7400";
                break;
 
-        case CPU_7410:
-                str = "MPC7410";
+       case CPU_7410:
+               str = "MPC7410";
                break;
 
-        case CPU_7450:
-                str = "MPC7450";
+       case CPU_7447A:
+               str = "MPC7447A";
+               break;
+
+       case CPU_7448:
+               str = "MPC7448";
+               break;
+
+       case CPU_7450:
+               str = "MPC7450";
+               break;
+
+       case CPU_7455:
+               str = "MPC7455";
+               break;
+
+       case CPU_7457:
+               str = "MPC7457";
                break;
 
        default:
-                printf("Unknown CPU -- PVR: 0x%08x\n", pvr);
+               printf("Unknown CPU -- PVR: 0x%08x\n", pvr);
                return -1;
        }
 
@@ -146,8 +199,8 @@ PR_CLK:
 #endif
 /* these two functions are unimplemented currently [josh] */
 
-/* ------------------------------------------------------------------------- */
-/* L1 i-cache                                                                */
+/* -------------------------------------------------------------------- */
+/* L1 i-cache                                                          */
 
 int
 checkicache(void)
@@ -155,8 +208,8 @@ checkicache(void)
        return 0; /* XXX */
 }
 
-/* ------------------------------------------------------------------------- */
-/* L1 d-cache                                                                */
+/* -------------------------------------------------------------------- */
+/* L1 d-cache                                                          */
 
 int
 checkdcache(void)
@@ -164,7 +217,7 @@ checkdcache(void)
        return 0; /* XXX */
 }
 
-/* ------------------------------------------------------------------------- */
+/* -------------------------------------------------------------------- */
 
 static inline void
 soft_restart(unsigned long addr)
@@ -183,12 +236,13 @@ soft_restart(unsigned long addr)
 
 #if !defined(CONFIG_PCIPPC2) && \
     !defined(CONFIG_BAB7xx)  && \
-    !defined(CONFIG_ELPPC)
+    !defined(CONFIG_ELPPC)   && \
+    !defined(CONFIG_PPMC7XX)
 /* no generic way to do board reset. simply call soft_reset. */
 void
-do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
-       ulong addr;
+       ulong addr;
        /* flush and disable I/D cache */
        __asm__ __volatile__ ("mfspr    3, 1008"        ::: "r3");
        __asm__ __volatile__ ("ori      5, 5, 0xcc00"   ::: "r5");
@@ -202,16 +256,16 @@ do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
        __asm__ __volatile__ ("isync");
        __asm__ __volatile__ ("sync");
 
-#ifdef CFG_RESET_ADDRESS
-       addr = CFG_RESET_ADDRESS;
+#ifdef CONFIG_SYS_RESET_ADDRESS
+       addr = CONFIG_SYS_RESET_ADDRESS;
 #else
        /*
-        * note: when CFG_MONITOR_BASE points to a RAM address,
-        * CFG_MONITOR_BASE - sizeof (ulong) is usually a valid
+        * note: when CONFIG_SYS_MONITOR_BASE points to a RAM address,
+        * CONFIG_SYS_MONITOR_BASE - sizeof (ulong) is usually a valid
         * address. Better pick an address known to be invalid on your
-        * system and assign it to CFG_RESET_ADDRESS.
+        * system and assign it to CONFIG_SYS_RESET_ADDRESS.
         */
-       addr = CFG_MONITOR_BASE - sizeof (ulong);
+       addr = CONFIG_SYS_MONITOR_BASE - sizeof (ulong);
 #endif
        soft_restart(addr);
        while(1);       /* not reached */
@@ -223,22 +277,19 @@ do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 /*
  * For the 7400 the TB clock runs at 1/4 the cpu bus speed.
  */
-#ifdef CONFIG_AMIGAONEG3SE
+#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SYS_CONFIG_BUS_CLK)
 unsigned long get_tbclk(void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        return (gd->bus_clk / 4);
 }
-#else  /* ! CONFIG_AMIGAONEG3SE */
+#else  /* ! CONFIG_AMIGAONEG3SE and !CONFIG_SYS_CONFIG_BUS_CLK*/
 
 unsigned long get_tbclk (void)
 {
-       return CFG_BUS_HZ / 4;
+       return CONFIG_SYS_BUS_HZ / 4;
 }
-#endif /* CONFIG_AMIGAONEG3SE */
+#endif /* CONFIG_AMIGAONEG3SE or CONFIG_SYS_CONFIG_BUS_CLK*/
 /* ------------------------------------------------------------------------- */
-
 #if defined(CONFIG_WATCHDOG)
 #if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx)
 void
@@ -250,3 +301,20 @@ watchdog_reset(void)
 #endif /* CONFIG_WATCHDOG */
 
 /* ------------------------------------------------------------------------- */
+
+#ifdef CONFIG_OF_LIBFDT
+void ft_cpu_setup(void *blob, bd_t *bd)
+{
+       do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+                            "timebase-frequency", bd->bi_busfreq / 4, 1);
+       do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+                            "bus-frequency", bd->bi_busfreq, 1);
+       do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+                            "clock-frequency", bd->bi_intfreq, 1);
+
+       fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+
+       fdt_fixup_ethernet(blob);
+}
+#endif
+/* ------------------------------------------------------------------------- */