FSL LAW: Keep track of LAW allocations

[u-boot] / cpu / 74xx_7xx / start.S

diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S
index 11430388f50213a35581a3a039d01e35a81c6a79..42b0f72ac048db8fae7e3824d975d32faa23d52e 100644 (file)
--- a/cpu/74xx_7xx/start.S
+++ b/cpu/74xx_7xx/start.S
@@ -125,7 +125,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -143,7 +143,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
@@ -316,7 +316,7 @@ invalidate_bats:
        mtspr   IBAT1U, r0
        mtspr   IBAT2U, r0
        mtspr   IBAT3U, r0
-#ifdef CONFIG_750FX
+#ifdef CONFIG_HIGH_BATS
        mtspr   IBAT4U, r0
        mtspr   IBAT5U, r0
        mtspr   IBAT6U, r0
@@ -327,7 +327,7 @@ invalidate_bats:
        mtspr   DBAT1U, r0
        mtspr   DBAT2U, r0
        mtspr   DBAT3U, r0
-#ifdef CONFIG_750FX
+#ifdef CONFIG_HIGH_BATS
        mtspr   DBAT4U, r0
        mtspr   DBAT5U, r0
        mtspr   DBAT6U, r0
@@ -414,7 +414,7 @@ setup_bats:
        mtspr   DBAT3U, r3
        isync
 
-#ifdef CONFIG_750FX
+#ifdef CONFIG_HIGH_BATS
        /* IBAT 4 */
        addis   r4, r0, CFG_IBAT4L@h
        ori     r4, r4, CFG_IBAT4L@l