ppc/85xx: add cpu init config file for boot from NAND

[u-boot] / cpu / arm1176 / cpu.c

diff --git a/cpu/arm1176/cpu.c b/cpu/arm1176/cpu.c
index ef78bd965ea0ead8a375326eaf88105df86407fe..d1a3327483f1af14ea8baec6beeb2587da7cb9b3 100644 (file)
--- a/cpu/arm1176/cpu.c
+++ b/cpu/arm1176/cpu.c
@@ -6,7 +6,7 @@
  * Marius Groeger <mgroeger@sysgo.de>
  *
  * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -38,20 +38,6 @@
 
 static void cache_flush (void);
 
-static void cp_delay (void)
-{
-       volatile int i;
-
-       /* Many OMAP regs need at least 2 nops  */
-       for (i = 0; i < 100; i++)
-               __asm__ __volatile__("nop\n");
-}
-
-int cpu_init (void)
-{
-       return 0;
-}
-
 int cleanup_before_linux (void)
 {
        /*
@@ -66,82 +52,12 @@ int cleanup_before_linux (void)
        /* turn off I/D-cache */
        icache_disable();
        dcache_disable();
+       /* flush I/D-cache */
        cache_flush();
 
        return 0;
 }
 
-
-/* * reset the cpu by setting up the watchdog timer and let him time out */
-void reset_cpu (ulong ignored)
-{
-       printf("reset... \n\n\n");
-       SW_RST_REG = 0x6400;
-       /* loop forever and wait for reset to happen */
-       while (1) {
-               if (serial_tstc()) {
-                       serial_getc();
-                       break;
-               }
-       }
-       /*NOTREACHED*/
-}
-
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
-       disable_interrupts ();
-       reset_cpu (0);
-       /*NOTREACHED*/
-       return 0;
-}
-
-void icache_enable (void)
-{
-       ulong reg;
-
-       reg = get_cr ();        /* get control reg. */
-       cp_delay ();
-       set_cr (reg | CR_I);
-}
-
-void icache_disable (void)
-{
-       ulong reg;
-
-       reg = get_cr ();
-       cp_delay ();
-       set_cr (reg & ~CR_I);
-}
-
-int icache_status (void)
-{
-       return (get_cr () & CR_I) != 0;
-}
-
-/* It makes no sense to use the dcache if the MMU is not enabled */
-void dcache_enable (void)
-{
-       ulong reg;
-
-       reg = get_cr ();
-       cp_delay ();
-       set_cr (reg | CR_C);
-}
-
-void dcache_disable (void)
-{
-       ulong reg;
-
-       reg = get_cr ();
-       cp_delay ();
-       set_cr (reg & ~CR_C);
-}
-
-int dcache_status (void)
-{
-       return (get_cr () & CR_C) != 0;
-}
-
 /* flush I/D-cache */
 static void cache_flush (void)
 {