Merge with /home/m8/git/u-boot

[u-boot] / cpu / arm920t / s3c24x0 / interrupts.c

diff --git a/cpu/arm920t/s3c24x0/interrupts.c b/cpu/arm920t/s3c24x0/interrupts.c
index f581d6d6079275c117ad8eb4a8f2fa6cbec8edbf..3ec9b5400e3ca04479b9a6e988265373458ae9cf 100644 (file)
--- a/cpu/arm920t/s3c24x0/interrupts.c
+++ b/cpu/arm920t/s3c24x0/interrupts.c
@@ -137,15 +137,24 @@ ulong get_timer_masked (void)
 void udelay_masked (unsigned long usec)
 {
        ulong tmo;
+       ulong endtime;
+       signed long diff;
 
-       tmo = usec / 1000;
-       tmo *= (timer_load_val * 100);
-       tmo /= 1000;
+       if (usec >= 1000) {
+               tmo = usec / 1000;
+               tmo *= (timer_load_val * 100);
+               tmo /= 1000;
+       } else {
+               tmo = usec * (timer_load_val * 100);
+               tmo /= (1000*1000);
+       }
 
-       reset_timer_masked ();
+       endtime = get_timer_masked () + tmo;
 
-       while (get_timer_masked () < tmo)
-               /*NOP*/;
+       do {
+               ulong now = get_timer_masked ();
+               diff = endtime - now;
+       } while (diff >= 0);
 }
 
 /*
@@ -176,4 +185,33 @@ ulong get_tbclk (void)
        return tbclk;
 }
 
+/*
+ * reset the cpu by setting up the watchdog timer and let him time out
+ */
+void reset_cpu (ulong ignored)
+{
+       volatile S3C24X0_WATCHDOG * watchdog;
+
+#ifdef CONFIG_TRAB
+       extern void disable_vfd (void);
+
+       disable_vfd();
+#endif
+
+       watchdog = S3C24X0_GetBase_WATCHDOG();
+
+       /* Disable watchdog */
+       watchdog->WTCON = 0x0000;
+
+       /* Initialize watchdog timer count register */
+       watchdog->WTCNT = 0x0001;
+
+       /* Enable watchdog timer; assert reset at timer timeout */
+       watchdog->WTCON = 0x0021;
+
+       while(1);       /* loop forever and wait for reset to happen */
+
+       /*NOTREACHED*/
+}
+
 #endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */