Merge branch 'master' into next

[u-boot] / cpu / arm926ejs / davinci / timer.c

diff --git a/cpu/arm926ejs/davinci/timer.c b/cpu/arm926ejs/davinci/timer.c
index c6b1dda51fcf86b782c78abd8aab23655d07ce5e..9da7443f30b5fea4df134a932ac49739f6c9e1ee 100644 (file)
--- a/cpu/arm926ejs/davinci/timer.c
+++ b/cpu/arm926ejs/davinci/timer.c
@@ -11,7 +11,7 @@
  * Alex Zuepke <azu@sysgo.de>
  *
  * (C) Copyright 2002-2004
- * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  *
  * (C) Copyright 2004
  * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
@@ -38,13 +38,13 @@
  */
 
 #include <common.h>
-#include <arm926ejs.h>
+#include <asm/io.h>
 
-typedef volatile struct {
+struct davinci_timer {
        u_int32_t       pid12;
-       u_int32_t       emumgt_clksped;
-       u_int32_t       gpint_en;
-       u_int32_t       gpdir_dat;
+       u_int32_t       emumgt;
+       u_int32_t       na1;
+       u_int32_t       na2;
        u_int32_t       tim12;
        u_int32_t       tim34;
        u_int32_t       prd12;
@@ -52,14 +52,13 @@ typedef volatile struct {
        u_int32_t       tcr;
        u_int32_t       tgcr;
        u_int32_t       wdtcr;
-       u_int32_t       tlgc;
-       u_int32_t       tlmr;
-} davinci_timer;
+};
 
-davinci_timer          *timer = (davinci_timer *)CFG_TIMERBASE;
+static struct davinci_timer * const timer =
+       (struct davinci_timer *)CONFIG_SYS_TIMERBASE;
 
-#define TIMER_LOAD_VAL (CFG_HZ_CLOCK / CFG_HZ)
-#define READ_TIMER     timer->tim34
+#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
+#define TIM_CLK_DIV    16
 
 static ulong timestamp;
 static ulong lastinc;
@@ -67,47 +66,30 @@ static ulong lastinc;
 int timer_init(void)
 {
        /* We are using timer34 in unchained 32-bit mode, full speed */
-       timer->tcr = 0x0;
-       timer->tgcr = 0x0;
-       timer->tgcr = 0x06;
-       timer->tim34 = 0x0;
-       timer->prd34 = TIMER_LOAD_VAL;
+       writel(0x0, &timer->tcr);
+       writel(0x0, &timer->tgcr);
+       writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr);
+       writel(0x0, &timer->tim34);
+       writel(TIMER_LOAD_VAL, &timer->prd34);
        lastinc = 0;
-       timer->tcr = 0x80 << 16;
        timestamp = 0;
+       writel(2 << 22, &timer->tcr);
 
        return(0);
 }
 
 void reset_timer(void)
 {
-       reset_timer_masked();
-}
-
-ulong get_timer(ulong base)
-{
-       return(get_timer_masked() - base);
-}
-
-void set_timer(ulong t)
-{
-       timestamp = t;
-}
-
-void udelay(unsigned long usec)
-{
-       udelay_masked(usec);
-}
-
-void reset_timer_masked(void)
-{
-       lastinc = READ_TIMER;
+       writel(0x0, &timer->tcr);
+       writel(0x0, &timer->tim34);
+       lastinc = 0;
        timestamp = 0;
+       writel(2 << 22, &timer->tcr);
 }
 
-ulong get_timer_raw(void)
+static ulong get_timer_raw(void)
 {
-       ulong now = READ_TIMER;
+       ulong now = readl(&timer->tim34);
 
        if (now >= lastinc) {
                /* normal mode */
@@ -120,20 +102,25 @@ ulong get_timer_raw(void)
        return timestamp;
 }
 
-ulong get_timer_masked(void)
+ulong get_timer(ulong base)
 {
-       return(get_timer_raw() / TIMER_LOAD_VAL);
+       return((get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base);
 }
 
-void udelay_masked(unsigned long usec)
+void set_timer(ulong t)
+{
+       timestamp = t;
+}
+
+void __udelay(unsigned long usec)
 {
        ulong tmo;
        ulong endtime;
        signed long diff;
 
-       tmo = CFG_HZ_CLOCK / 1000;
+       tmo = CONFIG_SYS_HZ_CLOCK / 1000;
        tmo *= usec;
-       tmo /= 1000;
+       tmo /= (1000 * TIM_CLK_DIV);
 
        endtime = get_timer_raw() + tmo;
 
@@ -158,8 +145,5 @@ unsigned long long get_ticks(void)
  */
 ulong get_tbclk(void)
 {
-       ulong tbclk;
-
-       tbclk = CFG_HZ;
-       return(tbclk);
+       return CONFIG_SYS_HZ;
 }