Add ARM946E cpu and core module targets; remap memory to 0x00000000

[u-boot] / cpu / arm926ejs / interrupts.c

diff --git a/cpu/arm926ejs/interrupts.c b/cpu/arm926ejs/interrupts.c
index ae8082d5ce6d24aa3500f9c26ab4f5d63596356e..0457bff96457e24836b1aeb6acd871348cf555fc 100644 (file)
--- a/cpu/arm926ejs/interrupts.c
+++ b/cpu/arm926ejs/interrupts.c
@@ -36,8 +36,7 @@
  */
 
 #include <common.h>
-#include <arm925t.h>
-
+#include <arm926ejs.h>
 #include <asm/proc-armv/ptrace.h>
 
 #define TIMER_LOAD_VAL 0xffffffff
@@ -46,9 +45,6 @@
 #ifdef CONFIG_OMAP
 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
 #endif
-#ifdef CONFIG_INTEGRATOR
-#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
-#endif
 #ifdef CONFIG_VERSATILE
 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
 #endif
@@ -186,6 +182,12 @@ void do_irq (struct pt_regs *pt_regs)
        bad_mode ();
 }
 
+#ifdef CONFIG_INTEGRATOR
+
+       /* Timer functionality supplied by Integrator board (AP or CP) */
+
+#else
+
 static ulong timestamp;
 static ulong lastdec;
 
@@ -200,12 +202,7 @@ int interrupt_init (void)
        val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
        *((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
 #endif /* CONFIG_OMAP */
-#ifdef CONFIG_INTEGRATOR
-       /* Load timer with initial value */
-       *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
-       /* Set timer to be enabled, free-running, no interrupts, 256 divider */
-       *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
-#endif /* CONFIG_INTEGRATOR */
+
 #ifdef CONFIG_VERSATILE
        *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD;      /* TimerLoad */
        *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD;      /* TimerValue */
@@ -332,3 +329,5 @@ ulong get_tbclk (void)
        tbclk = CFG_HZ;
        return tbclk;
 }
+
+#endif /* CONFIG_INTEGRATOR */