]> git.sur5r.net Git - u-boot/blobdiff - cpu/ixp/cpu.c
TQM85xx: Support for Intel 82527 compatible CAN controller
[u-boot] / cpu / ixp / cpu.c
index 2a2bd504dc468869ee32a018c4935ff98005a5f7..2c7d5a01be7ec25b6482e191bdbe216c41017875 100644 (file)
 #include <command.h>
 #include <asm/arch/ixp425.h>
 
+ulong loops_per_jiffy;
+
 #ifdef CONFIG_USE_IRQ
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
+#if defined(CONFIG_DISPLAY_CPUINFO)
+int print_cpuinfo (void)
+{
+       unsigned long id;
+       int speed = 0;
+
+       asm ("mrc p15, 0, %0, c0, c0, 0":"=r" (id));
+
+       puts("CPU:   Intel IXP425 at ");
+       switch ((id & 0x000003f0) >> 4) {
+       case 0x1c:
+               loops_per_jiffy = 887467;
+               speed = 533;
+               break;
+
+       case 0x1d:
+               loops_per_jiffy = 666016;
+               speed = 400;
+               break;
+
+       case 0x1f:
+               loops_per_jiffy = 442901;
+               speed = 266;
+               break;
+       }
+
+       if (speed)
+               printf("%d MHz\n", speed);
+       else
+               puts("unknown revision\n");
+
+       return 0;
+}
+#endif /* CONFIG_DISPLAY_CPUINFO */
+
 int cpu_init (void)
 {
        /*
@@ -48,7 +85,9 @@ int cpu_init (void)
        FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
 #endif
 
+#if defined(CONFIG_CMD_PCI) || defined (CONFIG_PCI)
        pci_init();
+#endif
        return 0;
 }
 
@@ -154,3 +193,25 @@ void pci_init(void)
        return;
 }
 */
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+
+void bootcount_store (ulong a)
+{
+       volatile ulong *save_addr = (volatile ulong *)(CFG_BOOTCOUNT_ADDR);
+
+       save_addr[0] = a;
+       save_addr[1] = BOOTCOUNT_MAGIC;
+}
+
+ulong bootcount_load (void)
+{
+       volatile ulong *save_addr = (volatile ulong *)(CFG_BOOTCOUNT_ADDR);
+
+       if (save_addr[1] != BOOTCOUNT_MAGIC)
+               return 0;
+       else
+               return save_addr[0];
+}
+
+#endif /* CONFIG_BOOTCOUNT_LIMIT */