OMAP3 Move cache routine to cache.S

[u-boot] / cpu / mcf547x_8x / cpu_init.c

diff --git a/cpu/mcf547x_8x/cpu_init.c b/cpu/mcf547x_8x/cpu_init.c
index 9a0e04083c6cd215076c99dd696f7e3cf86bfc5f..96a3132b7838a67638a3f73ee8d44be8f8ef87db 100644 (file)
--- a/cpu/mcf547x_8x/cpu_init.c
+++ b/cpu/mcf547x_8x/cpu_init.c
@@ -29,6 +29,12 @@
 #include <MCD_dma.h>
 #include <asm/immap.h>
 
+#if defined(CONFIG_CMD_NET)
+#include <config.h>
+#include <net.h>
+#include <asm/fsl_mcdmafec.h>
+#endif
+
 /*
  * Breath some life into the CPU...
  *
@@ -43,14 +49,14 @@ void cpu_init_f(void)
        volatile xlbarb_t *xlbarb = (volatile xlbarb_t *) MMAP_XARB;
 
        xlbarb->adrto = 0x2000;
-       xlbarb->datto = 0x2000;
+       xlbarb->datto = 0x2500;
        xlbarb->busto = 0x3000;
 
-       xlbarb->cfg = XARB_SR_AT | XARB_SR_DT;
+       xlbarb->cfg = XARB_CFG_AT | XARB_CFG_DT;
 
        /* Master Priority Enable */
-       xlbarb->pri = 0;
        xlbarb->prien = 0xff;
+       xlbarb->pri = 0;
 
 #if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) && defined(CONFIG_SYS_CS0_CTRL))
        fbcs->csar0 = CONFIG_SYS_CS0_BASE;
@@ -130,3 +136,24 @@ void uart_port_conf(void)
 
        *pscsicr &= 0xF8;
 }
+
+#if defined(CONFIG_CMD_NET)
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+       volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+       struct fec_info_dma *info = (struct fec_info_dma *)dev->priv;
+
+       if (setclear) {
+               if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
+                       gpio->par_feci2cirq |= 0xF000;
+               else
+                       gpio->par_feci2cirq |= 0x0FC0;
+       } else {
+               if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
+                       gpio->par_feci2cirq &= 0x0FFF;
+               else
+                       gpio->par_feci2cirq &= 0xF03F;
+       }
+       return 0;
+}
+#endif