Merge branch 'master' of git://git.denx.de/u-boot-arm

[u-boot] / cpu / microblaze / start.S

diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S
index ca3befc24e8ef868432bcf72b5f6b9064dd118d5..2e9a08dc54d39422ca21ec6045f5ba4c14e36161 100644 (file)
--- a/cpu/microblaze/start.S
+++ b/cpu/microblaze/start.S
@@ -30,26 +30,24 @@
        .global _start
 _start:
        mts     rmsr, r0        /* disable cache */
-       addi    r1, r0, CFG_INIT_SP_OFFSET
+       addi    r1, r0, CONFIG_SYS_INIT_SP_OFFSET
        addi    r1, r1, -4      /* Decrement SP to top of memory */
        /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/
-       addi    r6, r0, 0xb000  /* hex b000 opcode imm */
-       bslli   r6, r6, 16      /* shift */
+       addi    r6, r0, 0xb0000000      /* hex b000 opcode imm */
        swi     r6, r0, 0x0     /* reset address */
        swi     r6, r0, 0x8     /* user vector exception */
        swi     r6, r0, 0x10    /* interrupt */
        swi     r6, r0, 0x20    /* hardware exception */
 
-       addi    r6, r0, 0xb808  /* hew b808 opcode brai*/
-       bslli   r6, r6, 16
+       addi    r6, r0, 0xb8080000      /* hew b808 opcode brai*/
        swi     r6, r0, 0x4     /* reset address */
        swi     r6, r0, 0xC     /* user vector exception */
        swi     r6, r0, 0x14    /* interrupt */
        swi     r6, r0, 0x24    /* hardware exception */
 
-#ifdef CFG_RESET_ADDRESS
+#ifdef CONFIG_SYS_RESET_ADDRESS
        /* reset address */
-       addik   r6, r0, CFG_RESET_ADDRESS
+       addik   r6, r0, CONFIG_SYS_RESET_ADDRESS
        sw      r6, r1, r0
        lhu     r7, r1, r0
        shi     r7, r0, 0x2
@@ -58,11 +56,11 @@ _start:
  * Copy U-Boot code to TEXT_BASE
  * solve problem with sbrk_base
  */
-#if (CFG_RESET_ADDRESS != TEXT_BASE)
+#if (CONFIG_SYS_RESET_ADDRESS != TEXT_BASE)
        addi    r4, r0, __end
        addi    r5, r0, __text_start
        rsub    r4, r5, r4      /* size = __end - __text_start */
-       addi    r6, r0, CFG_RESET_ADDRESS       /* source address */
+       addi    r6, r0, CONFIG_SYS_RESET_ADDRESS        /* source address */
        addi    r7, r0, 0       /* counter */
 4:
        lw      r8, r6, r7
@@ -73,7 +71,7 @@ _start:
 #endif
 #endif
 
-#ifdef CFG_USR_EXCEP
+#ifdef CONFIG_SYS_USR_EXCEP
        /* user_vector_exception */
        addik   r6, r0, _exception_handler
        sw      r6, r1, r0
@@ -82,7 +80,7 @@ _start:
        shi     r6, r0, 0xe
 #endif
 
-#ifdef CFG_INTC_0
+#ifdef CONFIG_SYS_INTC_0
        /* interrupt_handler */
        addik   r6, r0, _interrupt_handler
        sw      r6, r1, r0
@@ -117,3 +115,36 @@ clear_bss:
 3:     /* jumping to board_init */
        brai    board_init
 1:     bri     1b
+
+/*
+ * Read 16bit little endian
+ */
+       .text
+       .global in16
+       .ent    in16
+       .align  2
+in16:  lhu     r3, r0, r5
+       bslli   r4, r3, 8
+       bsrli   r3, r3, 8
+       andi    r4, r4, 0xffff
+       or      r3, r3, r4
+       rtsd    r15, 8
+       sext16  r3, r3
+       .end    in16
+
+/*
+ * Write 16bit little endian
+ * first parameter(r5) - address, second(r6) - short value
+ */
+       .text
+       .global out16
+       .ent    out16
+       .align  2
+out16: bslli   r3, r6, 8
+       bsrli   r6, r6, 8
+       andi    r3, r3, 0xffff
+       or      r3, r3, r6
+       sh      r3, r0, r5
+       rtsd    r15, 8
+       or      r0, r0, r0
+       .end    out16