mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache

[u-boot] / cpu / mpc5xx / start.S

diff --git a/cpu/mpc5xx/start.S b/cpu/mpc5xx/start.S
index 95728373fbd723f7674c5a762717fef6f7ef651a..0637003ce29916b0fdd8ffd2b83a5a1e2335e41b 100644 (file)
--- a/cpu/mpc5xx/start.S
+++ b/cpu/mpc5xx/start.S
@@ -155,7 +155,7 @@ in_flash:
        /* Initialize some SPRs that are hard to access from C                  */
        /*----------------------------------------------------------------------*/
 
-       lis     r3, CFG_IMMR@h                  /* Pass IMMR as arg1 to C routine */
+       lis     r3, CFG_IMMR@h                  /* Pass IMMR as arg1 to C routine */
        lis     r2, CFG_INIT_SP_ADDR@h
        ori     r1, r2, CFG_INIT_SP_ADDR@l      /* Set up the stack in internal SRAM */
        /* Note: R0 is still 0 here */