Merge branch 'master' of git://git.denx.de/u-boot-blackfin

[u-boot] / cpu / mpc83xx / pci.c

diff --git a/cpu/mpc83xx/pci.c b/cpu/mpc83xx/pci.c
index 18558db537b70da01a14592f62481712cffa7f40..e9965d7df317e0dcf40520c987d42c367a2ce245 100644 (file)
--- a/cpu/mpc83xx/pci.c
+++ b/cpu/mpc83xx/pci.c
@@ -33,7 +33,6 @@
 
 #include <asm/mpc8349_pci.h>
 
-#ifdef CONFIG_83XX_GENERIC_PCI
 #define MAX_BUSES 2
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -43,7 +42,7 @@ static int pci_num_buses;
 
 static void pci_init_bus(int bus, struct pci_region *reg)
 {
-       volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
+       volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
        volatile pot83xx_t *pot = immr->ios.pot;
        volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[bus];
        struct pci_controller *hose = &pci_hose[bus];
@@ -84,7 +83,7 @@ static void pci_init_bus(int bus, struct pci_region *reg)
        pci_ctrl->pibar1 = 0;
        pci_ctrl->piebar1 = 0;
        pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
-                          PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
+                          PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size - 1));
 
        i = hose->region_count++;
        hose->regions[i].bus_start = 0;
@@ -95,8 +94,8 @@ static void pci_init_bus(int bus, struct pci_region *reg)
        hose->first_busno = 0;
        hose->last_busno = 0xff;
 
-       pci_setup_indirect(hose, CFG_IMMR + 0x8300 + bus * 0x80,
-                                CFG_IMMR + 0x8304 + bus * 0x80);
+       pci_setup_indirect(hose, CONFIG_SYS_IMMR + 0x8300 + bus * 0x80,
+                                CONFIG_SYS_IMMR + 0x8304 + bus * 0x80);
 
        pci_register_hose(hose);
 
@@ -119,10 +118,12 @@ static void pci_init_bus(int bus, struct pci_region *reg)
 #ifdef CONFIG_PCI_SCAN_SHOW
        printf("PCI:   Bus Dev VenId DevId Class Int\n");
 #endif
+#ifndef CONFIG_PCISLAVE
        /*
         * Hose scan.
         */
        hose->last_busno = pci_hose_scan(hose);
+#endif
 }
 
 /*
@@ -134,7 +135,7 @@ static void pci_init_bus(int bus, struct pci_region *reg)
  */
 void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot)
 {
-       volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
+       volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
        int i;
 
        if (num_buses > MAX_BUSES) {
@@ -168,6 +169,35 @@ void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot)
                pci_init_bus(i, reg[i]);
 }
 
+#ifdef CONFIG_PCISLAVE
+
+#define PCI_FUNCTION_CONFIG    0x44
+#define PCI_FUNCTION_CFG_LOCK  0x20
+
+/*
+ * Unlock the configuration bit so that the host system can begin booting
+ *
+ * This should be used after you have:
+ * 1) Called mpc83xx_pci_init()
+ * 2) Set up your inbound translation windows to the appropriate size
+ */
+void mpc83xx_pcislave_unlock(int bus)
+{
+       struct pci_controller *hose = &pci_hose[bus];
+       u32 dev;
+       u16 reg16;
+
+       /* Unlock configuration lock in PCI function configuration register */
+       dev = PCI_BDF(hose->first_busno, 0, 0);
+       pci_hose_read_config_word (hose, dev, PCI_FUNCTION_CONFIG, &reg16);
+       reg16 &= ~(PCI_FUNCTION_CFG_LOCK);
+       pci_hose_write_config_word (hose, dev, PCI_FUNCTION_CONFIG, reg16);
+
+       /* The configuration bit is now unlocked, so we can scan the bus */
+       hose->last_busno = pci_hose_scan(hose);
+}
+#endif
+
 #if defined(CONFIG_OF_LIBFDT)
 void ft_pci_setup(void *blob, bd_t *bd)
 {
@@ -209,4 +239,3 @@ void ft_pci_setup(void *blob, bd_t *bd)
        }
 }
 #endif /* CONFIG_OF_LIBFDT */
-#endif /* CONFIG_83XX_GENERIC_PCI */