85xx: Move LAW init code into C

[u-boot] / cpu / mpc85xx / spd_sdram.c

diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c
index adc9c4dd40ec356d241569a2e4ca00aebabb1690..bb5dc1f44a572c0fdaaa92e6cf3ed15dd9bc7985 100644 (file)
--- a/cpu/mpc85xx/spd_sdram.c
+++ b/cpu/mpc85xx/spd_sdram.c
@@ -27,6 +27,7 @@
 #include <i2c.h>
 #include <spd.h>
 #include <asm/mmu.h>
+#include <asm/fsl_law.h>
 
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
@@ -1022,7 +1023,9 @@ spd_sdram(void)
 static unsigned int
 setup_laws_and_tlbs(unsigned int memsize)
 {
+#ifndef CONFIG_FSL_LAW
        volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
+#endif
        unsigned int tlb_size;
        unsigned int law_size;
        unsigned int ram_tlb_index;
@@ -1098,12 +1101,17 @@ setup_laws_and_tlbs(unsigned int memsize)
        /*
         * Set up LAWBAR for all of DDR.
         */
+
+#ifdef CONFIG_FSL_LAW
+       set_law(1, CFG_DDR_SDRAM_BASE, law_size, LAW_TRGT_IF_DDR);
+#else
        ecm->lawbar1 = ((CFG_DDR_SDRAM_BASE >> 12) & 0xfffff);
        ecm->lawar1 = (LAWAR_EN
                       | LAWAR_TRGT_IF_DDR
                       | (LAWAR_SIZE & law_size));
        debug("DDR: LAWBAR1=0x%08x\n", ecm->lawbar1);
        debug("DDR: LARAR1=0x%08x\n", ecm->lawar1);
+#endif
 
        /*
         * Confirm that the requested amount of memory was mapped.